I finally got myself a serial cable, but there's a BIG gotcha. My whole plan was to have a data logging device that boots very quickly. Hence, my use of LinuxBIOS. Here's the gotcha: There's an EIGHT SECOND delay from power on (or reset switch) until the time LinuxBIOS sends anything to the serial port. Anyone have any ideas about this one? FWIW, the stock BIOS shows a logo within 3 seconds of power on.
Here's the relevant section of the LinuxBIOS output regarding VGA, which is what I wanted to get working. I'm thinking "Oops, Exception 6" might be a problem, as well as the "Bailing out" message.
I'm pretty sure my VGA Bios is okay: 1) The image file begins with AA55 (or 55AA, whatever it is) 2) X.org starts okay, which uses the BIOS, AFAIK; when I had a BAD Bios, X wouldn't start. 3) LinuxBIOS actually finds the AA55 sig, or else it wouldn't print what you see below.
Anyone have any thoughts on the VGA?
Thanks
--Eric
------------------------------------------------------ found VGA: vid=1106, did=3122 rom base, size: fffc0000 write_protect_vgabios bus/devfn = 0x100 biosint: INT# 0x6 biosint: eax 0x5f00 ebx 0x18538 ecx 0x17fa0 edx 0xa biosint: ebp 0x17f70 esp 0xfec edi 0xecf0 esi 0x18538 biosint: ip 0xf85e cs 0xf000 flags 0x86 biosint: Oops, exception 6 Stack contents: 0xf85e 0xf000 0x0086 0x6a1f 0xc000 0x0046 0x7fa0 0x89b5 0xb155 0x0000 biosint: Bailing out biosint: INT# 0x10 biosint: eax 0x4f14 ebx 0x18003 ecx 0x1 edx 0x0 biosint: ebp 0x17fa0 esp 0xffa edi 0x0 esi 0x18538 biosint: ip 0xafd9 cs 0x0 flags 0x46 BIOSINT: Unsupport int #0x10 ------------------------------------------------------
Full output of LinuxBIOS:
0
LinuxBIOS-1.1.8.0Fallback Thu Apr 20 17:57:10 PDT 2006 starting... Enabling mainboard devices Enabling shadow ram vt8623 init starting Detecting Memory Number of Banks 04 Number of Rows 0d Priamry DRAM width08 No Columns 0a MA type e0 Bank 0 (*16 Mb) 10 No Physical Banks 01 Total Memory (*16 Mb) 10 CAS Supported 2 2.5 3 Cycle time at CL X (nS)50 Cycle time at CL X-0.5 (nS)60 Cycle time at CL X-1 (nS)75 Starting at CAS 3 We can do CAS 2.5 We can do CAS 2 tRP 48 tRCD 48 tRAS 28 Low Bond 00 High Bondbc Setting DQS delay7dvt8623 done 00:06 11 23 31 06 00 30 22 00 00 00 06 00 00 00 00 10:08 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00 20:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30:00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40:00 18 88 80 82 44 00 00 18 99 88 80 82 44 00 00 50:c8 de cf 88 e0 07 00 00 e0 00 10 10 10 10 00 00 60:02 ff 00 30 d6 32 01 2a 42 2d 43 58 00 44 00 00 70:82 48 00 01 01 08 50 00 01 00 00 00 00 00 00 02 80:0f 65 00 00 80 00 00 00 02 00 00 00 00 00 00 00 90:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0:02 c0 20 00 07 02 00 1f 04 00 00 00 2f 02 04 00 b0:00 00 00 00 80 00 00 00 88 00 00 00 00 00 00 00 c0:01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0:00 dd 00 00 00 00 01 00 40 00 00 00 00 00 00 00 f0:00 00 00 00 00 00 12 13 00 00 00 00 00 00 00 00 AGP Doing MTRR init. Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.8.0Fallback Thu Apr 20 17:58:10 PDT 2006 booting... clocks_per_usec: 838 Enumerating buses... Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 enabled PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1106/3123] enabled PCI: 00:01.0 [1106/b091] enabled Disabling static device: PCI: 00:0a.0 Disabling static device: PCI: 00:0a.1 In vt8235_enable 1106 3038. PCI: 00:10.0 [1106/3038] enabled In vt8235_enable 1106 3038. PCI: 00:10.1 [1106/3038] enabled In vt8235_enable 1106 3038. PCI: 00:10.2 [1106/3038] enabled In vt8235_enable 1106 3104. PCI: 00:10.3 [1106/3104] enabled In vt8235_enable 1106 3177. Initialising Devices PCI: 00:11.0 [1106/3177] enabled In vt8235_enable 1106 0571. PCI: 00:11.1 [1106/0571] enabled In vt8235_enable 1106 3059. PCI: 00:11.5 [1106/3059] enabled In vt8235_enable ffff ffff. In vt8235_enable 1106 3065. PCI: 00:12.0 [1106/3065] enabled PCI: pci_scan_bus for bus 1 PCI: 01:00.0 [1106/3122] enabled PCI: pci_scan_bus returning with max=01 vt1211 enabling PNP devices. PNP: 002e.0 enabled vt1211 enabling PNP devices. PNP: 002e.1 enabled vt1211 enabling PNP devices. PNP: 002e.2 enabled vt1211 enabling PNP devices. PNP: 002e.3 enabled vt1211 enabling PNP devices. PNP: 002e.b enabled PCI: pci_scan_bus returning with max=01 done Allocating resources... Reading resources... Done reading resources. Setting resources... I would set ram size to 0x40000 Kbytes PCI: 00:10.0 20 <- [0x0000001800 - 0x000000181f] io PCI: 00:10.1 20 <- [0x0000001820 - 0x000000183f] io PCI: 00:10.2 20 <- [0x0000001840 - 0x000000185f] io PCI: 00:10.3 10 <- [0x00febff000 - 0x00febff0ff] mem PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] io PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] irq PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] drq PNP: 002e.1 60 <- [0x0000000378 - 0x000000037f] io PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] irq PNP: 002e.1 74 <- [0x0000000003 - 0x0000000003] drq PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] irq PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] io PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] irq PNP: 002e.b 60 <- [0x000000ec00 - 0x000000ecff] io PCI: 00:11.1 20 <- [0x0000001860 - 0x000000186f] io PCI: 00:11.5 10 <- [0x0000001000 - 0x00000010ff] io PCI: 00:12.0 10 <- [0x0000001400 - 0x00000014ff] io PCI: 00:12.0 14 <- [0x00fec00000 - 0x00fec000ff] mem Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 146 PCI: 00:01.0 bridge ctrl <- 000f PCI: 00:01.0 cmd <- 147 PCI: 01:00.0 cmd <- 140 PCI: 00:10.0 subsystem <- 00/00 PCI: 00:10.0 cmd <- 141 PCI: 00:10.1 subsystem <- 00/00 PCI: 00:10.1 cmd <- 141 PCI: 00:10.2 subsystem <- 00/00 PCI: 00:10.2 cmd <- 141 PCI: 00:10.3 subsystem <- 00/00 PCI: 00:10.3 cmd <- 142 PCI: 00:11.0 cmd <- 147 PNP: 002e.0 - enabling PNP: 002e.1 - enabling PNP: 002e.2 - enabling PNP: 002e.3 - enabling PNP: 002e.b - enabling PCI: 00:11.1 cmd <- 147 PCI: 00:11.5 subsystem <- 00/00 PCI: 00:11.5 cmd <- 141 PCI: 00:12.0 cmd <- 1c3 done. Initializing devices... Root Device init PCI: 00:10.0 init PCI: 00:10.1 init PCI: 00:10.2 init PCI: 00:10.3 init PCI: 00:11.0 init vt8235 init RTC Init Invalid CMOS LB checksum pci_routing_fixup: dev is 00010fa0 setting firewire setting usb Assigning IRQ 5 to 0:10.0 Readback = 5 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 9 to 0:10.1 Readback = 9 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 9 to 0:10.2 Readback = 9 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 5 to 0:10.3 Readback = 5 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 setting vt8235 Assigning IRQ 5 to 0:11.1 Readback = 5 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 9 to 0:11.5 Readback = 9 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 setting ethernet Assigning IRQ 5 to 0:12.0 Readback = 5 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 setting vga Assigning IRQ 5 to 1:0.0 Readback = 5 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 setting pci slot setting cardbus slot setting riser slot PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.3 init PNP: 002e.b init PCI: 00:11.1 init Enabling VIA IDE. ide_init: enabling compatibility IDE addresses enables in reg 0x42 0x0 enables in reg 0x42 read back as 0x0 enables in reg 0x40 0x13 enables in reg 0x40 read back as 0x13 enables in reg 0x9 0x8a enables in reg 0x9 read back as 0x8a command in reg 0x4 0x7 command in reg 0x4 reads back as 0x7 PCI: 00:11.5 init PCI: 00:12.0 init Configuring VIA Rhine LAN APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor Centaur device 673 Enabling cache
Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB Setting fixed MTRRs(24-88) Type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 128MB, type WB Setting variable MTRR 1, base: 128MB, range: 64MB, type WB Setting variable MTRR 2, base: 192MB, range: 32MB, type WB DONE variable MTRRs Clear out the extra MTRR's
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
Disabling local apic...done. CPU #0 Initialized PCI: 00:00.0 init VT8623 random fixup ... Frame buffer at d0000000 PCI: 00:01.0 init VT8623 AGP random fixup ... PCI: 01:00.0 init VGA random fixup ... INSTALL REAL-MODE IDT DO THE VGA BIOS found VGA: vid=1106, did=3122 rom base, size: fffc0000 write_protect_vgabios bus/devfn = 0x100 biosint: INT# 0x6 biosint: eax 0x5f00 ebx 0x18538 ecx 0x17fa0 edx 0xa biosint: ebp 0x17f70 esp 0xfec edi 0xecf0 esi 0x18538 biosint: ip 0xf85e cs 0xf000 flags 0x86 biosint: Oops, exception 6 Stack contents: 0xf85e 0xf000 0x0086 0x6a1f 0xc000 0x0046 0x7fa0 0x89b5 0xb155 0x0000 biosint: Bailing out biosint: INT# 0x10 biosint: eax 0x4f14 ebx 0x18003 ecx 0x1 edx 0x0 biosint: ebp 0x17fa0 esp 0xffa edi 0x0 esi 0x18538 biosint: ip 0xafd9 cs 0x0 flags 0x46 BIOSINT: Unsupport int #0x10 Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 done. ACPI: Writing ACPI tables at f0400... ACPI: * FACS ACPI: * DSDT @ 000f049e Length 3f0 ACPI: * FADT ACPI: added table 1/5 Length now 40 ACPI: done. Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 00000b80 checksum d885
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3
33:stream_init() - rom_stream: 0xfffd0000 - 0xfffeffff Found ELF candiate at offset 0 New segment addr 0x100000 size 0x23760 offset 0xc0 filesize 0x96e8 (cleaned up) New segment addr 0x100000 size 0x23760 offset 0xc0 filesize 0x96e8 New segment addr 0x123760 size 0x48 offset 0x97c0 filesize 0x48 (cleaned up) New segment addr 0x123760 size 0x48 offset 0x97c0 filesize 0x48 Dropping non PT_LOAD segment Dropping non PT_LOAD segment Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000023760 filesz: 0x00000000000096e8 Clearing Segment: addr: 0x00000000001096e8 memsz: 0x000000000001a078 Loading Segment: addr: 0x0000000000123760 memsz: 0x0000000000000048 filesz: 0x0000000000000048 Jumping to boot code at 0x107860 FILO version 0.4.2 (root@embedded) Thu Apr 20 16:57:23 PDT 2006 boot: hda1:/vmlinuz root=/dev/hda1 console=tty0 console=ttyS0,115200 hda: LBA 80GB: WDC WD800JB-00FMA0 Mounted ext2fs Found Linux version 2.6.12-10-386 (buildd@rothera) #1 Mon Jan 16 17:18:08 UTC 2006 bzImage. Loading kernel... ok Jumping to entry point... [4294667.296000] Linux version 2.6.12-10-386 (buildd@rothera) (gcc version 3.4.5 20050809 (prerelease) (Ubuntu 3.4.4-6ubuntu8)) #1 Mon Jan 16 17:18:08 UTC 2006 [4294667.296000] BIOS-provided physical RAM map: [4294667.296000] BIOS-e820: 0000000000000be0 - 00000000000a0000 (usable) [4294667.296000] BIOS-e820: 0000000000100000 - 000000000e000000 (usable) [4294667.296000] 0MB HIGHMEM available. [4294667.296000] 224MB LOWMEM available. [4294667.296000] DMI not present. [4294667.296000] ACPI: PM-Timer IO Port: 0x408 [4294667.296000] Allocating PCI resources starting at 0e000000 (gap: 0e000000:f2000000) [4294667.296000] Built 1 zonelists [4294667.296000] Kernel command line: root=/dev/hda1 console=tty0 console=ttyS0,115200 [4294667.296000] No local APIC present or hardware disabled [4294667.296000] Initializing CPU#0 [4294667.296000] PID hash table entries: 1024 (order: 10, 16384 bytes) [4294667.296000] Detected 533.331 MHz processor. [4294667.296000] Using pmtmr for high-res timesource [4294667.296000] Console: colour dummy device 80x25 [4294667.508000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) [4294667.518000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) [4294667.579000] Memory: 224044k/229376k available (1416k kernel code, 4888k reserved, 762k data, 224k init, 0k highmem) [4294667.590000] Checking if this processor honours the WP bit even in supervisor mode... Ok. [4294667.625000] Security Framework v1.0.0 initialized [4294667.630000] SELinux: Disabled at boot. [4294667.635000] Mount-cache hash table entries: 512 [4294667.640000] CPU: L1 I Cache: 64K (32 bytes/line), D cache 64K (32 bytes/line) [4294667.649000] CPU: L2 Cache: 64K (32 bytes/line) [4294667.654000] CPU: Centaur VIA Samuel 2 stepping 03 [4294667.660000] Checking 'hlt' instruction... OK. [4294667.669000] Checking for popad bug... OK. [4294667.730000] not found! [4294667.735000] ACPI: setting ELCR to 0020 (from 0220) [4294667.742000] NET: Registered protocol family 16 [4294667.748000] EISA bus registered [4294667.752000] ACPI: bus type pci registered [4294667.810000] PCI: Using configuration type 1 [4294667.815000] mtrr: v2.0 (20020519) [4294667.821000] ACPI: Subsystem revision 20050729 [4294667.885000] ACPI: Interpreter enabled [4294667.890000] ACPI: Using PIC for interrupt routing [4294667.897000] ACPI: PCI Interrupt Link [LNKA] (IRQs *5 9 10) [4294667.904000] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *9 10) [4294667.911000] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 *9 10) [4294667.918000] ACPI: PCI Interrupt Link [LNKD] (IRQs *5 9 10) [4294667.925000] ACPI: PCI Root Bridge [PCI0] (0000:00) [4294667.931000] PCI: Probing PCI hardware (bus 00) [4294667.937000] ACPI: Assume root bridge [_SB_.PCI0] segment is 0 [4294667.948000] Linux Plug and Play Support v0.97 (c) Adam Belay [4294667.955000] pnp: PnP ACPI init [4294667.959000] pnp: PnP ACPI: found 0 devices [4294667.964000] PnPBIOS: Disabled by ACPI PNP [4294667.969000] PCI: Using ACPI for IRQ routing [4294667.974000] PCI: If a device doesn't work, try "pci=routeirq". If it helps, post a report [4294667.986000] audit: initializing netlink socket (disabled) [4294667.993000] audit: initialized [4294667.997000] VFS: Disk quotas dquot_6.5.1 [4294668.002000] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) [4294668.010000] devfs: 2004-01-31 Richard Gooch (rgooch@atnf.csiro.au) [4294668.018000] devfs: boot_options: 0x0 [4294668.022000] Initializing Cryptographic API [4294668.028000] isapnp: Scanning for PnP cards... [4294668.387000] isapnp: No Plug & Play device found [4294668.483000] PNP: No PS/2 controller found. Probing ports directly. [4294668.490000] serio: i8042 AUX port at 0x60,0x64 irq 12 [4294668.497000] serio: i8042 KBD port at 0x60,0x64 irq 1 [4294668.503000] Serial: 8250/16550 driver $Revision: 1.90 $ 54 ports, IRQ sharing enabled [4294668.513000] ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A [4294668.519000] ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A [4294668.533000] io scheduler noop registered [4294668.538000] io scheduler anticipatory registered [4294668.544000] io scheduler deadline registered [4294668.549000] io scheduler cfq registered [4294668.556000] RAMDISK driver initialized: 16 RAM disks of 65536K size 1024 blocksize [4294668.565000] EISA: Probing bus 0 at eisa.0 [4294668.570000] Cannot allocate resource for EISA slot 1 [4294668.577000] EISA: Detected 0 cards. [4294668.581000] NET: Registered protocol family 2 [4294668.596000] IP: routing cache hash table of 2048 buckets, 16Kbytes [4294668.604000] TCP established hash table entries: 8192 (order: 4, 65536 bytes) [4294668.613000] TCP bind hash table entries: 8192 (order: 3, 32768 bytes) [4294668.621000] TCP: Hash tables configured (established 8192 bind 8192) [4294668.629000] NET: Registered protocol family 8 [4294668.635000] NET: Registered protocol family 20 [4294668.640000] ACPI wakeup devices: [4294668.645000] [4294668.646000] ACPI: (supports S0 S5) [4294668.655000] VFS: Cannot open root device "hda1" or unknown-block(0,0) [4294668.663000] Please append a correct "root=" boot option
Don't worry about this part ... Kernel issues I can fix =)
[4294668.669000] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) [4294668.679000]
Eric Poulsen wrote:
Here's the relevant section of the LinuxBIOS output regarding VGA, which is what I wanted to get working. I'm thinking "Oops, Exception 6" might be a problem, as well as the "Bailing out" message.
well, that's bad.
Can you try booting without vga to start, and run vga under the testbios emulator (see util/testbios) and let us know if that works?
thanks
ron
well, that's bad.
Can you try booting without vga to start, and run vga under the testbios emulator (see util/testbios) and let us know if that works?
I don't think that will help much. The via video bios is known not to work under the emulator. [Issue54] That's why the via code does the drop back to 16-bit trick and runs the vbios natively.
-- Richard A. Smith
Richard Smith wrote:
well, that's bad.
Can you try booting without vga to start, and run vga under the testbios emulator (see util/testbios) and let us know if that works?
I don't think that will help much. The via video bios is known not to work under the emulator. [Issue54] That's why the via code does the drop back to 16-bit trick and runs the vbios natively.
Sorry, I forgot about that.
Ollie and I are off to taiwan to work on OLPC. I'll try to look at this when we get back.
thanks
ron
my use of LinuxBIOS. Here's the gotcha: There's an EIGHT SECOND delay from power on (or reset switch) until the time LinuxBIOS sends anything to the serial port. Anyone have any ideas about this one?
Yep. I do. I'm pretty sure its the scan for the firewire device. Heres the snip from a past thread on this.
===================== Ok, first I have commented out enable_smbus(), for that there are unreadable characters at the console and it takes the same time --> the false way
Then I recognized the lines above in auto.c, which disable the Firewire stuff, but The Epia-ML does not have Firewire, ok it is the same chipset and the firewire is integrated in the chip, but voila it works.
I have commented out line 119-123 and all works fine on high speed :D Is there a better way? ======================
Whats happening is that the PCI code does a complete PCI space lookup looking for the firewire bridge which is not there. Apparently thats about 8 seconds. So comment out the search for the firewire bridge in auto.c and retry.
I'm going to go a head and setup a new directory for the EPIA ML so we can fix this properly.
Dunno about your VGA issues. I seem to remember that there was only 1 version of the vbios that actually worked. Check the archives.
-- Richard A. Smith
On Thu, Apr 20, 2006 at 08:57:06PM -0700, Eric Poulsen wrote:
bus/devfn = 0x100 biosint: INT# 0x6 biosint: eax 0x5f00 ebx 0x18538 ecx 0x17fa0 edx 0xa biosint: ebp 0x17f70 esp 0xfec edi 0xecf0 esi 0x18538 biosint: ip 0xf85e cs 0xf000 flags 0x86 biosint: Oops, exception 6 Stack contents: 0xf85e 0xf000 0x0086 0x6a1f 0xc000 0x0046 0x7fa0 0x89b5 0xb155 0x0000 biosint: Bailing out
Unsupported instruction.. What 16 bytes are at f000:f85e?
biosint: INT# 0x10 biosint: eax 0x4f14 ebx 0x18003 ecx 0x1 edx 0x0 biosint: ebp 0x17fa0 esp 0xffa edi 0x0 esi 0x18538 biosint: ip 0xafd9 cs 0x0 flags 0x46 BIOSINT: Unsupport int #0x10
VBE OEM interface, bl=function. Side-effect of the above?
//Peter
[NB: I wrote this originally as a reply to my original post to LinuxBIOS. I didn't realize that the LB mailing list did not set the 'reply-to' field. In conjunction with how my email filters work, I thought this email went to the list, but it only came to me! In any case, I'll send it for posterity, but I'll add additional remarks in square brackets WRT what I have discovered]
I've created an Epia-ML target, and I'm making changes that I hope will work. Presently, I'm trying to change the VGA settings, but I'm a bit confused on the PCI device IDs
I know that the ML Shows up as a 3122 instead of the 3123 as found on the M series. AFAIK, 3122 == ML and 3123 == M. The write_protect_vgabios function in src/mainboard/via/epia-ml/mainboard.c looks like this:
void write_protect_vgabios(void) { device_t dev;
printk_info("write_protect_vgabios\n"); /* there are two possible devices. Just do both. */ dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0); if(dev) pci_write_config8(dev, 0x61, 0xaa);
dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0); if(dev) pci_write_config8(dev, 0x61, 0xaa); }
Since this is an ML specific target, can I remove the 3123 attempt?
Also:
[The supposition I make below is wrong. The VT 8623 and CLE266_VGA are different. When I changed the PCI_DEVICE_ID_VIA_8623 to PCI_DEVICE_ID_VIA_CLE266_VGA in the struct, LB did not work.]
src/include/device/pci_ids.h has these declarations:
#define PCI_DEVICE_ID_VIA_CLE266_VGA 0x3122 #define PCI_DEVICE_ID_VIA_8623 0x3123
The file src/northbridge/via/vt8623/northbridge.c has this struct defined:
static struct pci_driver northbridge_driver __pci_driver = { .ops = &northbridge_operations, .vendor = PCI_VENDOR_ID_VIA, .device = PCI_DEVICE_ID_VIA_8623, };
I know pretty much zero about how PCI and the chipset works. Both the M and ML datasheets say they have the CLE266 northbridge. Web searches seem to imply that "vt8623" and "cle266" are interchangeable terms. I'm wondering if the ML target should have a struct that refers to PCI_DEVICE_ID_VIA_CLE266_VGA (3122) instead of PCI_DEVICE_ID_VIA_8623 (3123). If so, since this file is in src/src/northbridge/via/vt8623/northbridge.c, is there a way of separating it to have two versions (or #defines) for the M and ML targets?
Also:
[The supposition I make below is wrong. The VT 8623 and CLE266_VGA are different. When I changed the PCI_DEVICE_ID_VIA_8623 to PCI_DEVICE_ID_VIA_CLE266_VGA in the struct, LB did not work.]
Search the archives. People have booted the ML with existing setups. That's probally why no ML directory was ever created. They just tweaked the M setup. You will have to go back and find what those tweaks were.
-- Richard A. Smith
-
Eric Poulsen -
Peter Stuge -
Richard Smith -
Ronald G Minnich