Patch set updated for coreboot: d75af2f Sandybridge: Fix MRC cache calculation

[Patrick Georgi]

Patrick Georgi ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1046

-gerrit

commit d75af2fac06191f07b91fdad5f61fa936deebb2a
Author: Stefan Reinauer 
Date:   Wed May 23 11:21:10 2012 -0700

Sandybridge: Fix MRC cache calculation

The MRC region is described by Kconfig variables, no further math
    or parsing is required at this point.

Change-Id: I290d8788b69ef007e9ea2317ce55aefa2d791883
    Signed-off-by: Stefan Reinauer 
---
 src/northbridge/intel/sandybridge/mrccache.c |    6 ++----
 1 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index 5c4c382..aad2b91 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -65,8 +65,8 @@ u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
 {
    u8 *mrc_region;
    u32 region_size;
-	u32 *data;
 #ifdef USE_FDT_FMAP_FOR_MRC_CACHE
+	u32 *data;
    const struct fdt_header *fdt_header;
    const struct fdt_property *fdtp;
    int offset, len;
@@ -114,10 +114,8 @@ u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
    region_size = fdt32_to_cpu(data[1]);
    mrc_region = (u8*)((unsigned long)flashrom_base + fdt32_to_cpu(data[0]));
 #else
-	data = (u32 *)((void *)(CONFIG_MRC_CACHE_BASE + CONFIG_MRC_CACHE_LOCATION + 12));
-
    region_size = CONFIG_MRC_CACHE_SIZE;
-	mrc_region = (u8*)(CONFIG_MRC_CACHE_BASE + be32_to_cpu(data[0]));
+	mrc_region = (u8*)(CONFIG_MRC_CACHE_BASE + CONFIG_MRC_CACHE_LOCATION);
 #endif

*mrc_region_ptr = (struct mrc_data_container *)mrc_region;