the following patch was just integrated into master: commit 138f2cede491b65cfd8c73b9185a2dc7ee10b8b3 Author: Duncan Laurie dlaurie@chromium.org Date: Wed Dec 12 09:22:34 2012 -0800
haswell: remove GPIO60 memory reset gate on S3 transition
This is no longer tied to a GPIO but has a proper chipset pin.
Change-Id: Iba70338e8c67e3c3c1cb32e69bfea1282fda8cb5 Signed-off-by: Duncan Laurie dlaurie@chromium.org Reviewed-on: http://review.coreboot.org/2643 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich rminnich@gmail.com
Build-Tested: build bot (Jenkins) at Tue Mar 12 02:34:50 2013, giving +1 Reviewed-By: Ronald G. Minnich rminnich@gmail.com at Thu Mar 14 06:36:21 2013, giving +2 See http://review.coreboot.org/2643 for details.
-gerrit