attached. Cleans up the ifeq stuff, and fixes the bug for boards that use sse. failover.inc MUST come after enable_sse or your CPU will hang.
not build tested.
ron
ron minnich wrote:
failover.inc MUST come after enable_sse or your CPU will hang.
Can you say why?
Does it hang in the SSE code or in the failover code?
Does this mean that failover requires SSE in order to work?
Clean up this file to use the new MMX and SSE config variables.
Signed-off-by: Ronald G. Minnich rminnich@gmail.com
(maybe change "this file" to the filename?)
Acked-by: Peter Stuge peter@stuge.se
On Thu, Oct 8, 2009 at 9:31 AM, Peter Stuge peter@stuge.se wrote:
ron minnich wrote:
failover.inc MUST come after enable_sse or your CPU will hang.
Can you say why?
yes. if you compile failover.c with romcc options that include sse, then you'll see code like this in failover.inc: mov eax, %xmm0
This will hang if you have not first enabled sse. Verified yesterday on the dell s1850.
Does it hang in the SSE code or in the failover code?
It will hang in failover code, if that code was compiled with sse.
Does this mean that failover requires SSE in order to work?
no, but if it uses sse, it will hang.
Acked-by: Peter Stuge peter@stuge.se
There's still one last bit of cleanup if this patch works: the makefile options for romcc need to depend on the cpu type. But one thing at a time.
Committed revision 4746.
Note that this file was not tested, but this layout (moving failover.inc after sse enable) was tested on the dell
ron
ron minnich wrote:
failover.inc MUST come after enable_sse or your CPU will hang.
Can you say why?
yes. if you compile failover.c with romcc options that include sse, then you'll see code like this in failover.inc: mov eax, %xmm0
This will hang if you have not first enabled sse. Verified yesterday on the dell s1850.
Thanks for the explanation!
the makefile options for romcc need to depend on the cpu type.
Right - I touched on this the other day too. It just makes sense.
//Peter
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Peter Stuge -
ron minnich