Hi Volks, the ST-3WT boots but it dosn't load the rtl8139.elf oder zelf image for pxe.
There is the boot log:
Sep 19:08:00 CEST 2007 starting... Setting up default parameters for memory Sizing memory Probing for DIMM0 Found DIMM0 Page Size: 00002000 Component Banks: 4 Module Banks: 1 DIMM size: 08000000 Probing for DIMM1 MC_BANK_CFG = 00701530 Copying LinuxBIOS to RAM. Jumping to LinuxBIOS. LinuxBIOS-2.0.0.0Normal So 30. Sep 19:08:00 CEST 2007 booting... clocks_per_usec: 360 Enumerating buses... Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [1078/0001] enabled PCI: 00:0f.0 [10ec/8139] enabled PCI: 00:12.0 [1078/0100] enabled PCI: 00:12.1 [1078/0101] enabled PCI: 00:12.2 [1078/0102] enabled PCI: 00:12.3 [1078/0103] enabled PCI: 00:12.4 [1078/0104] enabled PCI: 00:13.0 [0e11/a0f8] enabled PNP: 002e.0 enabled PNP: 002e.1 enabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.4 enabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 enabled PNP: 002e.8 enabled PCI: 00:12.1 disabled PCI: 00:12.2 enabled PCI: 00:12.3 disabled PCI: 00:12.4 disabled PCI: pci_scan_bus returning with max=000 done Allocating resources... Reading resources... Done reading resources. Setting resources... BC_DRAM_TOP = 0x07bfffff MC_GBASE_ADD = 0x000000f8 I would set ram size to 124 Mbytes PCI: 00:0f.0 10 <- [0x0000001000 - 0x00000010ff] io PCI: 00:0f.0 14 <- [0x00febfd000 - 0x00febfd0ff] mem PCI: 00:12.1 10 <- [0x00febfe000 - 0x00febfe0ff] mem PCI: 00:12.2 20 <- [0x0000001400 - 0x000000147f] io PCI: 00:12.3 10 <- [0x00febff000 - 0x00febff07f] mem PCI: 00:12.4 10 <- [0x00febfb000 - 0x00febfbfff] mem PCI: 00:13.0 10 <- [0x00febfc000 - 0x00febfcfff] mem Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 07 PCI: 00:0f.0 cmd <- 03 PCI: 00:12.0 cmd <- 0f PCI: 00:12.2 missing enable_resources PCI: 00:12.1 cmd <- 02 PCI: 00:12.2 cmd <- 01 PCI: 00:12.3 cmd <- 02 PCI: 00:12.4 cmd <- 02 PCI: 00:13.0 cmd <- 02 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:12.0 init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.4 init PNP: 002e.5 init PNP: 002e.6 init PNP: 002e.7 init PNP: 002e.8 init PCI: 00:0f.0 init PCI: 00:12.1 init PCI: 00:12.2 init Primary IDE interface disabled Secondary IDE interface enabled PCI: 00:12.3 init PCI: 00:12.4 init PCI: 00:13.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 done. Moving GDT to 0x500...ok Adjust low_table_end from 0x00000530 to 0x00001000 Adjust rom_table_end from 0x000f0400 to 0x00100000 Wrote linuxbios table at: 00000530 - 0000068c checksum 7000
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3
rom_stream: 0xfffc0000 - 0xfffcffff No header at 0 ... ... ... No header at 8096 header_offset is -1 Can not load ELF
The Config.lb
# Config file for the Eaglelion 5BCM motherboard # This will make a target directory of 5bcm
target 5bcm mainboard eaglelion/5bcm
option ROM_SIZE=512*1024
romimage "normal" option USE_FALLBACK_IMAGE=0 option ROM_IMAGE_SIZE=0x10000 option LINUXBIOS_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf # payload ../../../../../lnxieepro100.ebi # payload /etc/hosts payload /home/ryven/hardware/Linuxbios/payload/rtl8139.elf end
romimage "fallback" option USE_FALLBACK_IMAGE=1 option ROM_IMAGE_SIZE=0x10000 option LINUXBIOS_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf # payload ../../../../../lnxieepro100.ebia # payload /etc/hosts payload /home/ryven/hardware/Linuxbios/payload/rtl8139.elf end
buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"
The lspci -vv
Geode:~# lspci -vv 0000:00:00.0 Host bridge: Cyrix Corporation PCI Master Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0
0000:00:0f.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (rev 10) Subsystem: Realtek Semiconductor Co., Ltd. RT8139 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (8000ns min, 16000ns max) Interrupt: pin A routed to IRQ 11 Region 0: I/O ports at e000 [size=256] Region 1: Memory at d0000000 (32-bit, non-prefetchable) [size=256] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME-
0000:00:12.0 ISA bridge: Cyrix Corporation 5530 Legacy [Kahlua] (rev 30) Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64, Cache Line Size: 0x04 (16 bytes)
0000:00:12.1 Bridge: Cyrix Corporation 5530 SMI [Kahlua] Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Region 0: Memory at 40012000 (32-bit, non-prefetchable) [size=256]
0000:00:12.2 IDE interface: Cyrix Corporation 5530 IDE [Kahlua] (prog-if 80 [Master]) Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Region 4: I/O ports at f000 [size=16]
0000:00:12.3 Multimedia audio controller: Cyrix Corporation 5530 Audio [Kahlua] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Region 0: Memory at 40011000 (32-bit, non-prefetchable) [size=128]
0000:00:12.4 VGA compatible controller: Cyrix Corporation 5530 Video [Kahlua] (prog-if 00 [VGA]) Subsystem: Cyrix Corporation: Unknown device 0001 Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Region 0: Memory at 40800000 (32-bit, non-prefetchable) [size=8M]
0000:00:13.0 USB Controller: Compaq Computer Corporation ZFMicro Chipset USB (rev 06) (prog-if 10 [OHCI]) Subsystem: Compaq Computer Corporation ZFMicro Chipset USB Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (20000ns max), Cache Line Size: 0x08 (32 bytes) Interrupt: pin A routed to IRQ 15 Region 0: Memory at d0004000 (32-bit, non-prefetchable) [size=4K]
Can say me somebody what i make wrong?
Greeding Markus
On 9/30/07, Markus Boas bios@ryven.de wrote:
rom_stream: 0xfffc0000 - 0xfffcffff No header at 0 ... ... ... No header at 8096 header_offset is -1 Can not load ELF
so it can not find any elf image. Your part is 256KB, right? you're sure it is not 512KiB for example?
option ROM_SIZE=512*1024
oh but it is! The search is starting at fffc0000 and it should start at fff80000. that's your problem.
But why is the elf loader doing that? I can not recall what would make it do this. Let me know if you find it, if not, I can try to look.
ron
Markus wrote:
In the config file I change the ROM_Size, but I don't know the right value for the ROM_IMAGE_SIZE. The 0x10000 build but it was the right value for the 256 KB flash. A doubel to 0x20000 would not build.
Markus
ROM_IMAGE_SIZE is decieving, it's the amount of space to allow LinuxBIOS (not including the payload) to occupy, for each image (normal/fallback). It's safe to leave it as 0x10000, or increment as necessary if LB needs more room, but LB doesn't like to have TOO much room. Whatever space is left over can be used for a payload or left empty.
-Corey
Am Mon, 1 Oct 2007 10:04:41 -0700 schrieb "ron minnich" rminnich@gmail.com:
On 9/30/07, Markus Boas bios@ryven.de wrote:
rom_stream: 0xfffc0000 - 0xfffcffff No header at 0 ... ... ... No header at 8096 header_offset is -1 Can not load ELF
so it can not find any elf image. Your part is 256KB, right? you're sure it is not 512KiB for example?
The Flash is a Amd Am29F040B, this should be a 512 KB, or I'm wrong. The orginal Flash ist only a 256 KB, but LB boots so this souldn't boarder.
option ROM_SIZE=512*1024
oh but it is! The search is starting at fffc0000 and it should start at fff80000. that's your problem.
But why is the elf loader doing that? I can not recall what would make it do this. Let me know if you find it, if not, I can try to look.
ron
In the config file I change the ROM_Size, but I don't know the right value for the ROM_IMAGE_SIZE. The 0x10000 build but it was the right value for the 256 KB flash. A doubel to 0x20000 would not build.
Markus
Am Dienstag 02 Oktober 2007 schrieb Corey Osgood:
Markus wrote:
In the config file I change the ROM_Size, but I don't know the right value for the ROM_IMAGE_SIZE. The 0x10000 build but it was the right value for the 256 KB flash. A doubel to 0x20000 would not build.
Markus
ROM_IMAGE_SIZE is decieving, it's the amount of space to allow LinuxBIOS (not including the payload) to occupy, for each image (normal/fallback). It's safe to leave it as 0x10000, or increment as necessary if LB needs more room, but LB doesn't like to have TOO much room. Whatever space is left over can be used for a payload or left empty.
-Corey
So today I'm able to load etherboot:
------ Calibrating delay loop... ok No LinuxBIOS table found. Found chipset "CS5530/CS5530A": Enabling flash write... OK. Am29F040B found at physical address: 0xfff80000 Flash part is Am29F040B (512 KB) Note: If the following flash access fails, you might need to specify -m <vendor>:<mainboard> Programming page 0007 at address: 0x0007ffff Geode:~# 0.0.0Normal Di 16. Okt 19:23:27 CEST 2007 starting... Setting up default parameters for memory Sizing memory Probing for DIMM0 Found DIMM0 Page Size: 00002000 Component Banks: 4 Module Banks: 1 DIMM size: 08000000 Probing for DIMM1 MC_BANK_CFG = 00701530 Copying LinuxBIOS to RAM. Jumping to LinuxBIOS. LinuxBIOS-2.0.0.0Normal Di 16. Okt 19:23:27 CEST 2007 booting... clocks_per_usec: 360 Enumerating buses... Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [1078/0001] enabled PCI: 00:0f.0 [10ec/8139] enabled PCI: 00:12.0 [1078/0100] enabled PCI: 00:12.1 [1078/0101] enabled PCI: 00:12.2 [1078/0102] enabled PCI: 00:12.3 [1078/0103] enabled PCI: 00:12.4 [1078/0104] enabled PCI: 00:13.0 [0e11/a0f8] enabled PNP: 002e.0 enabled PNP: 002e.1 enabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.4 enabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 enabled PNP: 002e.8 enabled PCI: 00:12.1 disabled PCI: 00:12.2 enabled PCI: 00:12.3 disabled PCI: 00:12.4 disabled PCI: pci_scan_bus returning with max=000 done Allocating resources... Reading resources... Done reading resources. Setting resources... BC_DRAM_TOP = 0x07ffffff MC_GBASE_ADD = 0x00000100 I would set ram size to 128 Mbytes PCI: 00:0f.0 10 <- [0x0000001000 - 0x00000010ff] io PCI: 00:0f.0 14 <- [0x00febfd000 - 0x00febfd0ff] mem PCI: 00:12.1 10 <- [0x00febfe000 - 0x00febfe0ff] mem PCI: 00:12.2 20 <- [0x0000001400 - 0x000000147f] io PCI: 00:12.3 10 <- [0x00febff000 - 0x00febff07f] mem PCI: 00:12.4 10 <- [0x00febfb000 - 0x00febfbfff] mem PCI: 00:13.0 10 <- [0x00febfc000 - 0x00febfcfff] mem Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 07 PCI: 00:0f.0 cmd <- 03 PCI: 00:12.0 cmd <- 0f PCI: 00:12.2 missing enable_resources PCI: 00:12.1 cmd <- 02 PCI: 00:12.2 cmd <- 01 PCI: 00:12.3 cmd <- 02 PCI: 00:12.4 cmd <- 02 PCI: 00:13.0 cmd <- 02 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:12.0 init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.4 init PNP: 002e.5 init PNP: 002e.6 init PNP: 002e.7 init PNP: 002e.8 init PCI: 00:0f.0 init PCI: 00:12.1 init PCI: 00:12.2 init Primary IDE interface disabled Secondary IDE interface enabled PCI: 00:12.3 init PCI: 00:12.4 init PCI: 00:13.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 done. Moving GDT to 0x500...ok Adjust low_table_end from 0x00000530 to 0x00001000 Adjust rom_table_end from 0x000f0400 to 0x00100000 Wrote linuxbios table at: 00000530 - 0000068c checksum 71bc
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3
rom_stream: 0xfffc0000 - 0xfffcffff Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 Loading Etherboot version: 5.4.3 Dropping non PT_LOAD segment New segment addr 0x10000 size 0xb3c0 offset 0x0 filesize 0x6880 (cleaned up) New segment addr 0x10000 size 0xb3c0 offset 0x0 filesize 0x6880 Loading Segment: addr: 0x0000000007fe4000 memsz: 0x0000000000008000 filesz: 0x0000000000006880 Clearing Segment: addr: 0x0000000007fea880 memsz: 0x0000000000001780 Loading Segment: addr: 0x0000000000018000 memsz: 0x00000000000033c0 filesz: 0x0000000000000000 Clearing Segment: addr: 0x0000000000018000 memsz: 0x00000000000033c0 CPU 237 Mhzboot code at 0x100b0 Etherboot 5.4.3 (GPL) http://etherboot.org Drivers: r8169/PCI Images: ELF Protocols: DHCP TFTP Relocating _text from: [000100e0,0001b3c0) to [07ef4d20,07f00000) Boot from (N)etwork or (Q)uit?
----
I don't know why, but is in the config file a phrase there the loadarea for the elfloader ist specified? Because if i let the orginal 256 Kb rom size and doubel it after with cat linuxbios.rom linuxbios.rom > bios512.rom then it will boot. The change of the 256 to 512 in the config file at ./targets/eaglelion/5bcm/Config is not working.
Greeding Markus Boas
On 10/16/07, Markus Boas bios@ryven.de wrote:
The change of the 256 to 512 in the config file at ./targets/eaglelion/5bcm/Config is not working.
did you rerun buildtarget after the change?
ron
On 10/16/07, Markus bios@ryven.de wrote:
Am Tue, 16 Oct 2007 10:47:04 -0700 schrieb "ron minnich" rminnich@gmail.com:
On 10/16/07, Markus Boas bios@ryven.de wrote:
The change of the 256 to 512 in the config file at ./targets/eaglelion/5bcm/Config is not working.
did you rerun buildtarget after the change?
ron
Sure, I change it first an run then buildtarget. I think there are same hardcoded values out oft the Config.
I don't think it is a config iissue, I just tried and it builds 512K image just fine. This likely means a hardcoded constant somewhere in chipset setup such that only 256KB will work.
I've had this before and one common symptom is that you can cat two 256K images together to get a working bios but building a 512KB wont' work. Why? because the payload image in the 256k starts at fffc0000, which works; the payload in the 512k starts at fff80000, which won't work due to chipset setup issues.
ron
Am Tue, 16 Oct 2007 10:47:04 -0700 schrieb "ron minnich" rminnich@gmail.com:
On 10/16/07, Markus Boas bios@ryven.de wrote:
The change of the 256 to 512 in the config file at ./targets/eaglelion/5bcm/Config is not working.
did you rerun buildtarget after the change?
ron
Sure, I change it first an run then buildtarget. I think there are same hardcoded values out oft the Config.
Markus
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Corey Osgood -
Markus -
Markus Boas
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ron minnich