If no agp, Still need gart?
YH
PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart>
YhLu YhLu@tyan.com writes:
If no agp, Still need gart?
YH
PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart>
With more than 4GB of memory it is used as an IOMMU so you don't need bounce buffers.
Eric
On Thu, 2004-10-21 at 20:08, Eric W. Biederman wrote:
YhLu YhLu@tyan.com writes:
If no agp, Still need gart?
YH
PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart>
With more than 4GB of memory it is used as an IOMMU so you don't need bounce buffers.
Could you tell me more about this ? Is "bounce buffer" that bounce buffer for PCI DMA in the kernel ? How does an AGP aperture solve it ?
Ollie
Li-Ta Lo ollie@lanl.gov writes:
On Thu, 2004-10-21 at 20:08, Eric W. Biederman wrote:
With more than 4GB of memory it is used as an IOMMU so you don't need bounce buffers.
Could you tell me more about this ?
Some.
Is "bounce buffer" that bounce buffer for PCI DMA in the kernel ?
Yes. The simple explanation is that without an IOMMU the PCI hardware that is not capable of DAC cycles must DMA to and address below 4GB. If it is desired for that data to be above 4GB a temporary buffer is allocated below for 4GB (a bounce buffer) and after the DMA is complete the data is copied to the destination buffer.
The kernel swiotlb code from the ia64 implements this behavior.
How does an AGP aperture solve it ?
Because you can allocate a DMA target address below 4GB that points to memory above 4GB. So long as the IOUMMU setup is less expensive than the memory copy this is a win.
Eric
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Li-Ta Lo -
YhLu