I tried not to include any VBIOS file in coreboot ROM much earlier, in my first tests. With 'Run VGA Option ROMs' option checked the board just hung.
And as I mentioned in my previous email VGA works fine with vendor's BIOS. So the card itself should be fine.
Sadly, I don't have another card to try. Even if I had, I still would need to make this one work somehow as Mohon Peak is just a reference board and the target board will have a similar VGA controller.
So please, let me know if there are some other things I could try or if I am mistaken somewhere.
-Viktor
On 03/19/2015 09:20 PM, Marc Jones wrote:
Hi Viktor,
On Thu, Mar 19, 2015 at 4:23 AM Kuzmichev Viktor <kuzmichevviktorv@gmail.com mailto:kuzmichevviktorv@gmail.com> wrote:
Hello, I'm using coreboot + SeaBIOS on Mohon Peak CRB. And I've tried to make VGA work for a while now. I used this article as a guide: http://www.coreboot.org/VGA_supportSince it is an add-in card, you don't need to extract the VBIOS and put it into cbfs. The VBIOS on the card will run during the PCI card enumeration. It seems that there is a problem with that specific aspeed card and/or VBIOS. You may want to try a different card to avoid the issue. Please let us know the results if you debug that card further.
Regards, Marc
Extracting VGA BIOS from vendor BIOS image did not work: $ ./bios_extract EDVLCRB1.86B.0043.R00.1408290947_MPK.bin Using file "EDVLCRB1.86B.0043.R00.1408290947_MPK.bin" (8192kB) Error: Unable to detect BIOS Image type. Then, I've downloaded VGA BIOS from here: http://www.aspeedtech.com/support.php Mohon Peak uses Aspeed VGA controller AST1300. And also, I've extracted Video ROM from /dev/mem: # dd if=/dev/mem of=vgabios.bin bs=1k count=32 skip=768 Neither of them worked. Here's what I've tried. I've tried to add them via coreboot's menuconfig (' Add VGA BIOS image' option). I've tried to add them manually via cbfstool as an optionrom and as a raw file. I've tried to put them in CBFS under vgaroms/ directory. Here's my latest ROM-file layout: $ ./build/cbfstool build/coreboot.rom print coreboot.rom: 8192 kB, bootblocksize 1024, romsize 8388608, offset 0x600000 alignment: 64 bytes, architecture: x86 Name Offset Type Size cmos_layout.bin 0x600000 cmos_layout 1352 pci1a03,2000.rom 0x600580 optionrom 32768 fallback/romstage 0x6085c0 stage 26616 fallback/ramstage 0x60ee00 stage 59904 fallback/payload 0x61d840 payload 56100 config 0x62b3c0 raw 4532 revision 0x62c5c0 raw 708 pci8086,1f41.rom 0x62c8c0 raw 61952 vgaroms/pci1a03,2000.rom 0x63bb00 raw 32768 img/Memtest86+(5.01) 0x643b40 payload 159492 (empty) 0x66aa80 null 939288 mrc.cache 0x74ffc0 (unknown) 65536 cpu_microcode_blob.bin 0x760000 microcode 83968 (empty) 0x774840 null 46936 fsp.bin 0x77ffc0 (unknown) 372736 (empty) 0x7db000 null 150424 The entries pci1a03,2000.rom are the VGA ROMs there. I also tried to remove either of them. I've tested with coreboot option 'Run VGA Option ROMs' checked and unchecked without any difference. In SeaBIOS I set 'VGA Hardware Type (coreboot linear framebuffer)' as the other options are None, GeodeGX2 and GeodeLX, so coreboot linear framebuffer seemed more logical. I saw this mailing list: http://www.seabios.org/pipermail/seabios/2015-January/008588.html but found no solution there and it seems not to be my case as my board does not hang. I put coreboot and SeaBIOS output in the attachment. Debug levels set to 7 for both. In coreboot only 'Output verbose CBFS debug messages' checked in 'Debugging' submenu. Is there anything I'm doing wrong or simply missing? Viktor -- coreboot mailing list: coreboot@coreboot.org <mailto:coreboot@coreboot.org> http://www.coreboot.org/mailman/listinfo/coreboot
On Fri, Mar 20, 2015 at 12:30:38PM +0300, Kuzmichev Viktor wrote:
I tried not to include any VBIOS file in coreboot ROM much earlier, in my first tests. With 'Run VGA Option ROMs' option checked the board just hung.
And as I mentioned in my previous email VGA works fine with vendor's BIOS. So the card itself should be fine.
Sadly, I don't have another card to try. Even if I had, I still would need to make this one work somehow as Mohon Peak is just a reference board and the target board will have a similar VGA controller.
So please, let me know if there are some other things I could try or if I am mistaken somewhere.
Hi Viktor,
It seems you've tried a bunch of different configurations. However, this is making your trouble report hard to understand as it becomes unclear which config had which results.
If you have an external VGA card, then please build coreboot with CONFIG_VGA_ROM_RUN, CONFIG_ON_DEVICE_ROM_RUN, CONFIG_VGA_BIOS, and CONFIG_PXE_ROM all disabled. Please use either the SeaBIOS provided by coreboot, or build SeaBIOS with a default config (only CONFIG_COREBOOT and if needed CONFIG_DEBUG_SERIAL changed from the seabios defaults). This is described at: http://www.coreboot.org/SeaBIOS
In particular, there should be no "pciXXXX,YYYY.rom" or "vgaroms/XXX" files in your cbfs rom.
If the above does not work, please use the above config and recompile SeaBIOS at debug level 8, and post the full debug log along with the output of "cbfstool print".
Cheers, -Kevin
My experience is that the aspeed chip based graphics card that comes with Mohon Peak has a bug in the vbios causing it to hang when run. If you need to use this specific card, you'll need to debug it, probably with a jtag debugger, going through the assembly, and see what's causing the issue. My initial guess is that they're looking for some value in the bda or ebda that isn't present, but I'm not sure what this might be.
Martin
On Sun, Mar 22, 2015 at 8:45 AM, Kevin O'Connor kevin@koconnor.net wrote:
On Fri, Mar 20, 2015 at 12:30:38PM +0300, Kuzmichev Viktor wrote:
I tried not to include any VBIOS file in coreboot ROM much earlier, in my first tests. With 'Run VGA Option ROMs' option checked the board just
hung.
And as I mentioned in my previous email VGA works fine with vendor's
BIOS.
So the card itself should be fine.
Sadly, I don't have another card to try. Even if I had, I still would
need
to make this one work somehow as Mohon Peak is just a reference board and the target board will have a similar VGA controller.
So please, let me know if there are some other things I could try or if
I am
mistaken somewhere.
Hi Viktor,
It seems you've tried a bunch of different configurations. However, this is making your trouble report hard to understand as it becomes unclear which config had which results.
If you have an external VGA card, then please build coreboot with CONFIG_VGA_ROM_RUN, CONFIG_ON_DEVICE_ROM_RUN, CONFIG_VGA_BIOS, and CONFIG_PXE_ROM all disabled. Please use either the SeaBIOS provided by coreboot, or build SeaBIOS with a default config (only CONFIG_COREBOOT and if needed CONFIG_DEBUG_SERIAL changed from the seabios defaults). This is described at: http://www.coreboot.org/SeaBIOS
In particular, there should be no "pciXXXX,YYYY.rom" or "vgaroms/XXX" files in your cbfs rom.
If the above does not work, please use the above config and recompile SeaBIOS at debug level 8, and post the full debug log along with the output of "cbfstool print".
Cheers, -Kevin
-- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Hello.
Sorry it took me so long to reply.
So, I tried the suggested setup and it didn't work. Here is my CBFS: $ ./build/cbfstool build/coreboot.rom print coreboot.rom: 8192 kB, bootblocksize 1024, romsize 8388608, offset 0x600000 alignment: 64 bytes, architecture: x86
Name Offset Type Size cmos_layout.bin 0x600000 cmos_layout 1352 fallback/romstage 0x600580 stage 21848 fallback/ramstage 0x605b40 stage 46675 fallback/payload 0x611200 payload 61046 config 0x6200c0 raw 4268 revision 0x6211c0 raw 570 (empty) 0x621440 null 1239896 mrc.cache 0x74ffc0 mrc_cache 65536 cpu_microcode_blob.bin 0x760000 microcode 83968 (empty) 0x774840 null 46936 fsp.bin 0x77ffc0 fsp 372736 (empty) 0x7db000 null 150424
And the output log with SeaBIOS debug level set to 8 is in the attachment.
-Viktor
On 03/22/2015 05:45 PM, Kevin O'Connor wrote:
On Fri, Mar 20, 2015 at 12:30:38PM +0300, Kuzmichev Viktor wrote:
I tried not to include any VBIOS file in coreboot ROM much earlier, in my first tests. With 'Run VGA Option ROMs' option checked the board just hung.
And as I mentioned in my previous email VGA works fine with vendor's BIOS. So the card itself should be fine.
Sadly, I don't have another card to try. Even if I had, I still would need to make this one work somehow as Mohon Peak is just a reference board and the target board will have a similar VGA controller.
So please, let me know if there are some other things I could try or if I am mistaken somewhere.
Hi Viktor,
It seems you've tried a bunch of different configurations. However, this is making your trouble report hard to understand as it becomes unclear which config had which results.
If you have an external VGA card, then please build coreboot with CONFIG_VGA_ROM_RUN, CONFIG_ON_DEVICE_ROM_RUN, CONFIG_VGA_BIOS, and CONFIG_PXE_ROM all disabled. Please use either the SeaBIOS provided by coreboot, or build SeaBIOS with a default config (only CONFIG_COREBOOT and if needed CONFIG_DEBUG_SERIAL changed from the seabios defaults). This is described at: http://www.coreboot.org/SeaBIOS
In particular, there should be no "pciXXXX,YYYY.rom" or "vgaroms/XXX" files in your cbfs rom.
If the above does not work, please use the above config and recompile SeaBIOS at debug level 8, and post the full debug log along with the output of "cbfstool print".
Cheers, -Kevin
On Tue, Mar 31, 2015 at 03:22:10PM +0300, Kuzmichev Viktor wrote:
Hello.
Sorry it took me so long to reply.
So, I tried the suggested setup and it didn't work. Here is my CBFS: $ ./build/cbfstool build/coreboot.rom print coreboot.rom: 8192 kB, bootblocksize 1024, romsize 8388608, offset 0x600000 alignment: 64 bytes, architecture: x86
Name Offset Type Size cmos_layout.bin 0x600000 cmos_layout 1352 fallback/romstage 0x600580 stage 21848 fallback/ramstage 0x605b40 stage 46675 fallback/payload 0x611200 payload 61046 config 0x6200c0 raw 4268 revision 0x6211c0 raw 570 (empty) 0x621440 null 1239896 mrc.cache 0x74ffc0 mrc_cache 65536 cpu_microcode_blob.bin 0x760000 microcode 83968 (empty) 0x774840 null 46936 fsp.bin 0x77ffc0 fsp 372736 (empty) 0x7db000 null 150424
And the output log with SeaBIOS debug level set to 8 is in the attachment.
[...]
PCI probe PCI device 00:00.0 (vd=8086:1f08 c=0600) PCI device 00:01.0 (vd=8086:1f10 c=0604) PCI device 00:03.0 (vd=8086:1f12 c=0604) PCI device 00:0b.0 (vd=8086:1f18 c=0b40) PCI device 00:0e.0 (vd=8086:1f14 c=0600) PCI device 00:0f.0 (vd=8086:1f16 c=0806) PCI device 00:13.0 (vd=8086:1f15 c=0880) PCI device 00:14.0 (vd=8086:1f41 c=0200) PCI device 00:14.1 (vd=8086:1f41 c=0200) PCI device 00:14.2 (vd=8086:1f41 c=0200) PCI device 00:14.3 (vd=8086:1f41 c=0200) PCI device 00:16.0 (vd=8086:1f2c c=0c03) PCI device 00:17.0 (vd=8086:1f22 c=0106) PCI device 00:18.0 (vd=8086:1f32 c=0106) PCI device 00:1f.0 (vd=8086:1f38 c=0601) PCI device 00:1f.3 (vd=8086:1f3c c=0c05) PCI device 02:00.0 (vd=10b5:8624 c=0604) PCI device 03:04.0 (vd=10b5:8624 c=0604) PCI device 03:05.0 (vd=10b5:8624 c=0604) PCI device 03:08.0 (vd=10b5:8624 c=0604) PCI device 03:09.0 (vd=10b5:8624 c=0604) PCI device 05:00.0 (vd=8086:1528 c=0200) PCI device 05:00.1 (vd=8086:1528 c=0200) Found 23 PCI devices (max PCI bus is 07)
[...]
Scan for VGA option rom _malloc zone=0x7fd89ec8 size=4096 align=1000 ret=0x7fd7d000 (detail=0x7fd7e0d0)
[...]
SeaBIOS didn't find a VGA device at all. From the above "PCI device" list, which has the vga adapter? Do you have "lspci" output for this machine?
-Kevin
Yes, I do. With the vendor BIOS it looks as follows:
00:00.0 Host bridge: Intel Corporation Atom processor C2000 SoC Transaction Router (rev 02) 00:01.0 PCI bridge: Intel Corporation Atom processor C2000 PCIe Root Port 1 (rev 02) 00:02.0 PCI bridge: Intel Corporation Atom processor C2000 PCIe Root Port 2 (rev 02) 00:03.0 PCI bridge: Intel Corporation Atom processor C2000 PCIe Root Port 3 (rev 02) 00:0b.0 Co-processor: Intel Corporation Atom processor C2000 nCPM (rev 02) 00:0e.0 Host bridge: Intel Corporation Atom processor C2000 RAS (rev 02) 00:0f.0 IOMMU: Intel Corporation Atom processor C2000 RCEC (rev 02) 00:13.0 System peripheral: Intel Corporation Atom processor C2000 SMBus 2.0 (rev 02) 00:14.0 Ethernet controller: Intel Corporation Ethernet Connection I354 (rev 03) 00:14.1 Ethernet controller: Intel Corporation Ethernet Connection I354 (rev 03) 00:14.2 Ethernet controller: Intel Corporation Ethernet Connection I354 (rev 03) 00:14.3 Ethernet controller: Intel Corporation Ethernet Connection I354 (rev 03) 00:16.0 USB controller: Intel Corporation Atom processor C2000 USB Enhanced Host Controller (rev 02) 00:17.0 SATA controller: Intel Corporation Atom processor C2000 AHCI SATA2 Controller (rev 02) 00:18.0 SATA controller: Intel Corporation Atom processor C2000 AHCI SATA3 Controller (rev 02) 00:1f.0 ISA bridge: Intel Corporation Atom processor C2000 PCU (rev 02) 00:1f.3 SMBus: Intel Corporation Atom processor C2000 PCU SMBus (rev 02) 02:00.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 02) 03:00.0 VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics Family (rev 21) 04:00.0 PCI bridge: PLX Technology, Inc. PEX 8624 24-lane, 6-Port PCI Express Gen 2 (5.0 GT/s) Switch [ExpressLane] (rev bb) 05:04.0 PCI bridge: PLX Technology, Inc. PEX 8624 24-lane, 6-Port PCI Express Gen 2 (5.0 GT/s) Switch [ExpressLane] (rev bb) 05:05.0 PCI bridge: PLX Technology, Inc. PEX 8624 24-lane, 6-Port PCI Express Gen 2 (5.0 GT/s) Switch [ExpressLane] (rev bb) 05:08.0 PCI bridge: PLX Technology, Inc. PEX 8624 24-lane, 6-Port PCI Express Gen 2 (5.0 GT/s) Switch [ExpressLane] (rev bb) 05:09.0 PCI bridge: PLX Technology, Inc. PEX 8624 24-lane, 6-Port PCI Express Gen 2 (5.0 GT/s) Switch [ExpressLane] (rev bb) 07:00.0 Ethernet controller: Intel Corporation Ethernet Controller 10-Gigabit X540-AT2 (rev 01) 07:00.1 Ethernet controller: Intel Corporation Ethernet Controller 10-Gigabit X540-AT2 (rev 01)
But with coreboot + SeaBIOS it looks like this:
00:00.0 Host bridge: Intel Corporation Atom processor C2000 SoC Transaction Router (rev 02) 00:01.0 PCI bridge: Intel Corporation Atom processor C2000 PCIe Root Port 1 (rev 02) 00:03.0 PCI bridge: Intel Corporation Atom processor C2000 PCIe Root Port 3 (rev 02) 00:0b.0 Co-processor: Intel Corporation Atom processor C2000 nCPM (rev 02) 00:0e.0 Host bridge: Intel Corporation Atom processor C2000 RAS (rev 02) 00:0f.0 IOMMU: Intel Corporation Atom processor C2000 RCEC (rev 02) 00:13.0 System peripheral: Intel Corporation Atom processor C2000 SMBus 2.0 (rev 02) 00:14.0 Ethernet controller: Intel Corporation Ethernet Connection I354 (rev 03) 00:14.1 Ethernet controller: Intel Corporation Ethernet Connection I354 (rev 03) 00:14.2 Ethernet controller: Intel Corporation Ethernet Connection I354 (rev 03) 00:14.3 Ethernet controller: Intel Corporation Ethernet Connection I354 (rev 03) 00:16.0 USB controller: Intel Corporation Atom processor C2000 USB Enhanced Host Controller (rev 02) 00:17.0 SATA controller: Intel Corporation Atom processor C2000 AHCI SATA2 Controller (rev 02) 00:18.0 SATA controller: Intel Corporation Atom processor C2000 AHCI SATA3 Controller (rev 02) 00:1f.0 ISA bridge: Intel Corporation Atom processor C2000 PCU (rev 02) 00:1f.3 SMBus: Intel Corporation Atom processor C2000 PCU SMBus (rev 02) 02:00.0 PCI bridge: PLX Technology, Inc. PEX 8624 24-lane, 6-Port PCI Express Gen 2 (5.0 GT/s) Switch [ExpressLane] (rev bb) 03:04.0 PCI bridge: PLX Technology, Inc. PEX 8624 24-lane, 6-Port PCI Express Gen 2 (5.0 GT/s) Switch [ExpressLane] (rev bb) 03:05.0 PCI bridge: PLX Technology, Inc. PEX 8624 24-lane, 6-Port PCI Express Gen 2 (5.0 GT/s) Switch [ExpressLane] (rev bb) 03:08.0 PCI bridge: PLX Technology, Inc. PEX 8624 24-lane, 6-Port PCI Express Gen 2 (5.0 GT/s) Switch [ExpressLane] (rev bb) 03:09.0 PCI bridge: PLX Technology, Inc. PEX 8624 24-lane, 6-Port PCI Express Gen 2 (5.0 GT/s) Switch [ExpressLane] (rev bb) 05:00.0 Ethernet controller: Intel Corporation Ethernet Controller 10-Gigabit X540-AT2 (rev 01) 05:00.1 Ethernet controller: Intel Corporation Ethernet Controller 10-Gigabit X540-AT2 (rev 01)
As you can see, there's no ASPEED device in the second case.
-Viktor
On 03/31/2015 04:00 PM, Kevin O'Connor wrote:
On Tue, Mar 31, 2015 at 03:22:10PM +0300, Kuzmichev Viktor wrote:
Hello.
Sorry it took me so long to reply.
So, I tried the suggested setup and it didn't work. Here is my CBFS: $ ./build/cbfstool build/coreboot.rom print coreboot.rom: 8192 kB, bootblocksize 1024, romsize 8388608, offset 0x600000 alignment: 64 bytes, architecture: x86
Name Offset Type Size cmos_layout.bin 0x600000 cmos_layout 1352 fallback/romstage 0x600580 stage 21848 fallback/ramstage 0x605b40 stage 46675 fallback/payload 0x611200 payload 61046 config 0x6200c0 raw 4268 revision 0x6211c0 raw 570 (empty) 0x621440 null 1239896 mrc.cache 0x74ffc0 mrc_cache 65536 cpu_microcode_blob.bin 0x760000 microcode 83968 (empty) 0x774840 null 46936 fsp.bin 0x77ffc0 fsp 372736 (empty) 0x7db000 null 150424
And the output log with SeaBIOS debug level set to 8 is in the attachment.
[...]
PCI probe PCI device 00:00.0 (vd=8086:1f08 c=0600) PCI device 00:01.0 (vd=8086:1f10 c=0604) PCI device 00:03.0 (vd=8086:1f12 c=0604) PCI device 00:0b.0 (vd=8086:1f18 c=0b40) PCI device 00:0e.0 (vd=8086:1f14 c=0600) PCI device 00:0f.0 (vd=8086:1f16 c=0806) PCI device 00:13.0 (vd=8086:1f15 c=0880) PCI device 00:14.0 (vd=8086:1f41 c=0200) PCI device 00:14.1 (vd=8086:1f41 c=0200) PCI device 00:14.2 (vd=8086:1f41 c=0200) PCI device 00:14.3 (vd=8086:1f41 c=0200) PCI device 00:16.0 (vd=8086:1f2c c=0c03) PCI device 00:17.0 (vd=8086:1f22 c=0106) PCI device 00:18.0 (vd=8086:1f32 c=0106) PCI device 00:1f.0 (vd=8086:1f38 c=0601) PCI device 00:1f.3 (vd=8086:1f3c c=0c05) PCI device 02:00.0 (vd=10b5:8624 c=0604) PCI device 03:04.0 (vd=10b5:8624 c=0604) PCI device 03:05.0 (vd=10b5:8624 c=0604) PCI device 03:08.0 (vd=10b5:8624 c=0604) PCI device 03:09.0 (vd=10b5:8624 c=0604) PCI device 05:00.0 (vd=8086:1528 c=0200) PCI device 05:00.1 (vd=8086:1528 c=0200) Found 23 PCI devices (max PCI bus is 07)
[...]
Scan for VGA option rom _malloc zone=0x7fd89ec8 size=4096 align=1000 ret=0x7fd7d000 (detail=0x7fd7e0d0)
[...]
SeaBIOS didn't find a VGA device at all. From the above "PCI device" list, which has the vga adapter? Do you have "lspci" output for this machine?
-Kevin
Kuzmichev Viktor wrote:
Yes, I do. With the vendor BIOS it looks as follows:
00:00.0 Host bridge: Intel Corporation Atom processor C2000 SoC 00:01.0 PCI bridge: Intel Corporation Atom processor C2000 PCIe Root Port 1 00:02.0 PCI bridge: Intel Corporation Atom processor C2000 PCIe Root Port 2 00:03.0 PCI bridge: Intel Corporation Atom processor C2000 PCIe Root Port 3
..
00:0e.0 Host bridge: Intel Corporation Atom processor C2000 RAS (rev 02)
So there are the above bridges.
02:00.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge 03:00.0 VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics
Where does the 2:0.0 bridge hang off of?
Please post lspci -vs 2:0.0 and/or lspci -t
//Peter
-
Kevin O'Connor -
Kuzmichev Viktor -
Martin Roth -
Peter Stuge