Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/970
-gerrit
commit 448a58332fe61afe811862167486c6ec291963ba Author: Duncan Laurie dlaurie@chromium.org Date: Mon Apr 9 12:30:43 2012 -0700
Only send ME Dram Init Done message on Sandybridge
This is done inside the SystemAgent binary on Ivybridge.
Change-Id: I8fb0f593a65a4803e160b284c21b9d5021e2e4a0 Signed-off-by: Duncan Laurie dlaurie@chromium.org --- src/northbridge/intel/sandybridge/raminit.c | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index dcf9f63..bbb743f 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -27,6 +27,7 @@ #include <cbfs.h> #include <ip_checksum.h> #include <pc80/mc146818rtc.h> +#include <device/pci_def.h> #include "raminit.h" #include "pei_data.h" #include "sandybridge.h" @@ -365,7 +366,13 @@ void sdram_initialize(struct pei_data *pei_data) version >> 24 , (version >> 16) & 0xff, (version >> 8) & 0xff, version & 0xff);
- intel_early_me_init_done(ME_INIT_STATUS_SUCCESS); + /* Send ME init done for SandyBridge here. This is done + * inside the SystemAgent binary on IvyBridge. */ + if (BASE_REV_SNB == + (pci_read_config16(PCI_CPU_DEVICE, PCI_DEVICE_ID) & BASE_REV_MASK)) + intel_early_me_init_done(ME_INIT_STATUS_SUCCESS); + else + intel_early_me_status();
report_memory_config();