llandre wrote:
Why is the RAM physically unaccessible beyond 640 KByte at this stage?
Which chipset / board? It's not necessarily unaccessible.
AMD Geode LX/CS5536
I forgot to mention that is a custom board.
The 640-1MB area is covered by a basemask descriptor (A0000-BFFFFh) setup and used by graphics and a swisscheese descriptor (C0000h-FFFFFh) for the legacy shadow memory hole. In northbridge/amd/lx/northbridgeinit.c see the gliutables structures.
In both tables you could change the swisscheese to allow reads and writes to memory like this:
{.desc_name = MSR_GLIU0_SHADOW,.desc_type = SC_SHADOW,.hi = MSR_MC + 0xFFFF,.lo = 0xFFFF0003},
Marc