Date: Wed, 3 Oct 2007 01:54:50 +0200 From: uwe@hermann-uwe.de To: idwer_v@hotmail.com CC: linuxbios@linuxbios.org Subject: Re: FW: [LinuxBIOS] 440BX progress / superio w83977tf-aw
On Tue, Oct 02, 2007 at 01:21:23PM +0000, Idwer Vollering wrote:
http://linuxbios.org/pipermail/linuxbios/2006-November/017262.html
It boots (v2 r2811), but serial outputs says 'Can not load ELF Image.' which is correct because i didn't yet manage to get filo appended as a payload from targets/asus/p2b/Config.lb.
What options in Config.lb must be set to create enough space to include filo.elf (about 94 KB) using both normal and fallback sections; option ROM_IMAGE_SIZE = (some_substracted_size) * 1024 ?
No changes needed in Config.lb, I suggest you simply make filo smaller for now. Disable all unneeded options (ReiserFS, CDROM support, XFS support, all debugging, etc). You only need very few of the options. My filo.elf is 54KB, which is small enough for pretty much all boards.
Also, superio (from r2811) won't recognize the onboard winbond w83977tf-aw.
It is (partly) recognized, otherwise you wouldn't get any serial output.
The Config.lb stuff below is only executed very late in the boot process, but the serial console init (which needs the Super I/O) happens earlier. As you have serial output, that code works ok.
chip northbridge/intel/i440bx device pci_domain 0 on device pci 0.0 on end # host bridge device pci 1.0 on end # pci bridge / agp device/bridge chip southbridge/intel/i82371eb # southbridge device pci 4.0 on end # isa bridge chip superio/winbond/w83977tf # superio, winbond w83977tf-aw device pci 4.1 on end # ide interface device pci 4.2 on end # usb controller device pci 4.3 on end # acpi bridge
according to src/mainboard/tyan/s1846/Config.lb, this should be it:
chip northbridge/intel/i440bx # northbridge device pci_domain 0 on device pci 0.0 on end # host bridge device pci 1.0 on end # agp bridge
chip southbridge/intel/i82371eb # southbridge device pci 4.0 on # isa bridge chip superio/winbond/w83977tf # superio, winbond w83977tf-aw end end
device pci 4.1 on end # ide interface device pci 4.2 on end # usb controller device pci 4.3 on end # acpi bridge register "ide0_enable" = "1" register "ide1_enable" = "1" end end
chip cpu/intel/slot_2 end end
This looks broken. The PCI devices should not be inside the Super I/O section. Instead the superio-related stuff should be there. Have a look at some other boards for examples. The output of 'lspnp -v' (from original BIOS, and with all hardware attached, e.g. PS/2 keyboard, PS/2 mouse, etc) should give you some hints (please also post it here).
"lspnp: /proc/bus/pnp not available" (asus p2b bios v1012)
The kernel used is compiled with CONFIG_PNPBIOS=y
I'll try to dig out my P2B tomorrow or so and see how far I get, and maybe post some patch to improve it a bit. Please note that the 440BX code is still not very generic, it'll probably not work for this board (only the Tyan S1846 is confirmed to work so far). Fixing this is on my (huge) TODO list.
Where can i change the (hardcoded i believe) ramspeed/timings ?
Uwe.
http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org
_________________________________________________________________ Live.nl: je eigen persoonlijk startpagina met nieuws en feeds die JIJ belangrijk vindt! http://www.live.com/getstarted.aspx