6 May
2008
6 May
'08
4:40 p.m.
Marc Jones wrote:
ron minnich wrote:
I know some people will get upset by the find_pci_device, but: This patch fixes a long-standing problem in the cs5536 driver, that is probably also in v2.
..
It also did a write_config8,not write_config32; this bug has been in there since the code was written for v2. I don't know how or why it ever worked, since PWB is 1<<14.
Yup, bug. I will post a v2 patch.
PWB should be set for better performance so it shouldn't cause complete breakage.
--
Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:Marc.Jones@amd.com
http://www.amd.com/embeddedprocessors
PWB was not getting set since it is 1<<14 and it was only doing a pci_write_config8.
Signed-off-by: Marc Jones marc.jones@amd.com
Index: coreboot-v2/src/southbridge/amd/cs5536/cs5536_ide.c
===================================================================
--- coreboot-v2.orig/src/southbridge/amd/cs5536/cs5536_ide.c 2008-05-06 10:12:28.000000000 -0600
+++ coreboot-v2/src/southbridge/amd/cs5536/cs5536_ide.c 2008-05-06 10:12:49.000000000 -0600
@@ -43,7 +43,7 @@
// NOTE: Only 32-bit writes to the data buffer are allowed when PWB is set
ide_cfg = pci_read_config32(dev, IDE_CFG);
ide_cfg |= CHANEN | PWB;
- pci_write_config8(dev, IDE_CFG, ide_cfg);
+ pci_write_config32(dev, IDE_CFG, ide_cfg);
}
static void ide_enable(struct device *dev)