Quoting Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net:
On 04.03.2008 14:36, joe@smittys.pointclark.net wrote:
Quoting joe@smittys.pointclark.net:
Quoting joe@smittys.pointclark.net:
To check this with superiotool I have to be able to dump the "Runtime Registers", this is where the GPIO's are (See the SMSC lpc47m192 datasheet for more info). Currently superiotool does not dump these registers so modifications will be required.
I was relying on the new extended superiotool dumping functionality. That doesn't exist yet for your superio, so I should have written "...can find out with superiotool (once that has GPIO dumping support for your superio) and...". Thanks for correcting me.
Well, I wasn't able to get a dump of the "Runtime Registers" with superiotool working, but I was able to get a dump of it with the old dd method,
dd method? Can you please tell me the exact command for that? I think the extra register dumping for ITE is totally incompatible with the one for SMSC which would explain your problems.
rm4100 [root@localhost proc]# dd if=/dev/port bs=1 skip=$[0x0800] count=128 | xxd 256+0 records in 256+0 records out 256 bytes (256 B) copied, 0.00171602 s, 149 kB/s 0000000: 0000 0000 dc00 140f e700 0000 0000 0000 ................ 0000010: 0200 140f ce00 0000 0000 0000 0000 0302 ................ 0000020: 8100 0001 0101 0101 0101 0101 0101 0001 ................ 0000030: 0101 0105 0500 0000 0401 0101 0186 0105 ................ 0000040: 0505 0405 0405 0401 0100 0000 04d0 0007 ................ 0000050: 0000 0000 0000 0000 50ff ff00 0000 0000 ........P....... 0000060: 0000 0000 0000 0000 0000 0000 0000 0000 ................ 0000070: 0000 0000 0000 0000 0000 0000 0000 0000 ................
coreboot [root@localhost ~]# dd if=/dev/port bs=1 skip=$[0x0a00] count=128 | xxd 256+0 records in 256+0 records out 256 bytes (256 B) copied, 0.00217287 s, 118 kB/s 0000000: 0000 0000 d800 140f 6700 0000 0000 0000 ........g....... 0000010: 0200 140f c600 0000 0000 0000 0000 0302 ................ 0000020: 8100 0001 0101 0101 0101 0101 0101 0002 ................ 0000030: 0101 0101 0100 0005 0401 0101 0101 0101 ................ 0000040: 0101 0001 0101 0101 0100 0000 04d0 0423 ...............# 0000050: 0000 0000 0000 0000 50ff ff00 0000 0000 ........P....... 0000060: 0000 0000 0000 0000 0000 0000 0000 0000 ................ 0000070: 0000 0000 0000 0000 0000 0000 0000 0000 ................
there are alot of differences........maybe one of these GPIO settings is causing my flashrom issue??? It is hard to say without schmatics, but I could always try one register at a time until it works???
Yes. Or set all of them to the factory BIOS values at once and try again. Sometimes dependencies between various registers make it dangerous to change only a part of the values.
Which is a little weird, because in coreboot all the values aren't at their defaults, maybe hardwired?
rm4100 00 00 00 00 dc 00 14 0f e7 00 00 00 00 00 00 00 02 00 14 0f ce 00 00 00 00 00 00 00 00 00 03 02 81 00 00 01 01 01 01 01 01 01 01 01 01 01 00 01 01 01 01 05 05 00 00 00 04 01 01 01 01 86 01 05 05 05 04 05 04 05 04 01 01 00 00 00 04 d0 00 07 00 00 00 00 00 00 00 00 50 ff ff 00 00 00 00 00
coreboot 00 00 00 00 d8 00 14 0f 67 00 00 00 00 00 00 00 02 00 14 0f c6 00 00 00 00 00 00 00 00 00 03 02 81 00 00 01 01 01 01 01 01 01 01 01 01 01 00 02 01 01 01 01 01 00 00 05 04 01 01 01 01 01 01 01 01 01 00 01 01 01 01 01 01 00 00 00 04 d0 04 23 00 00 00 00 00 00 00 00 50 ff ff 00 00 00 00 00
Nice output.
The output is not that nice I had to doctor it up a little bit.
Thanks - Joe