Myles Watson wrote:
On Thu, Jul 16, 2009 at 8:33 AM, Jeffrey C. Jacobs <jacobs@itd.nrl.navy.mil mailto:jacobs@itd.nrl.navy.mil> wrote:
Myles Watson wrote: On Thu, Jul 16, 2009 at 6:55 AM, Jeffrey C. Jacobs <jacobs@itd.nrl.navy.mil <mailto:jacobs@itd.nrl.navy.mil> <mailto:jacobs@itd.nrl.navy.mil <mailto:jacobs@itd.nrl.navy.mil>>> wrote: Well, I just tried to build the Tyan S1846 board and got these warnings for CRT0:No .text warnings, though.
So I guess that may be a red herring since...Could be, but they still look suspicious to me.
I'll keep that in mind, thanks...
I would say that sounds like a negative number. So if you're telling it to fill a negative amount of space with 0xff... Maybe start by comparing ldscripts and offsets between the S1846 and your board? Try removing the gap-fill parameter to narrow it down?
I tried turning off the gap fill and got past the "Bad value" error and was able to produce a coreboot.strip file which turned out to be EXACTLY 2**32 bytes in size. I like your accidental negative idea though given that it is exactly 2**32, I think it may actually be an accidental 0. I wonder, were any new CONFIG_* parameters added in the last couple months? When I converted over, I searched all my old .lb parameters for any reference to the non-CONFIG form and am pretty sure I got them all, but if any were added that I didn't take into account, that may be the cause of my error in the latest Coreboot, though it wouldn't explain why I'm getting the same "Bad value" error on the older LinuxBIOS build. Also, what happens when I set CONFIG_ROM_IMAGE_SIZE to 0x0C000 if the coreboot ROM turns out to be bigger than 49152? What is a typically size for the coreboot ROM? I made the ROM Image Size so small because I only have a 256kB flash and GRUB2 with modules turned out to be a bit over 128kB (153900 Bytes). So, have I made a nubie mistake? I could have sworn this was working before I updated but if tweaking sizes here and there is the solution, that's what I'll try.
Thanks again Myles!
Jeffrey.