Uwe Hermann uwe@hermann-uwe.de writes:
i've added support for the SST 49LF020 Flash chip to flashrom. Basically only the device Id differs, the programming algorithm seems to be the same as for SST 49LF020A.
I've only tested read so far, i'm a bit reluctant to test erase/programming without a backup BIOS chip :)
You forgot the Signed-off-by for this patch, please repost with that. [..] As reading works, this is not UNSTESTED. At least PROBE and READ should be marked as working.
Thanks for commenting, here is the updated patch:
Signed-off-by: Sven Schnelle svens@stackframe.org
Index: coreboot-v2/util/flashrom/flash.h =================================================================== --- coreboot-v2/util/flashrom/flash.h (revision 3846) +++ coreboot-v2/util/flashrom/flash.h (working copy) @@ -356,6 +356,7 @@ #define SST_39VF040 0xD7 #define SST_49LF040B 0x50 #define SST_49LF040 0x51 +#define SST_49LF020 0x61 #define SST_49LF020A 0x52 #define SST_49LF080A 0x5B #define SST_49LF002A 0x57 Index: coreboot-v2/util/flashrom/flashchips.c =================================================================== --- coreboot-v2/util/flashrom/flashchips.c (revision 3846) +++ coreboot-v2/util/flashrom/flashchips.c (working copy) @@ -626,6 +626,12 @@ probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc },
+ {"SST", "SST49LF020", SST_ID, SST_49LF020, + 256, 16 * 1024, + TEST_OK_PR, + probe_jedec, erase_49lf040, write_49lf040 + }, + {"SST", "SST49LF020A", SST_ID, SST_49LF020A, 256, 16 * 1024, TEST_UNTESTED,