What he is trying to describe is that to use a PCI serial port card you fist have to enumerate the PCI bus and assign resources. Thats done after RAM + a bunch more is functional.
That's not true on all systems and all firmwares, FWIW; on your average x86 box though, it would be quite inconvenient to have to do the whole PCI setup (or even only part of it) before RAM is up.
So it doesn't help you bring up a northbridge.
Bringing up a northbridge requires that you have some sort of debug IO that can happen almost immediately after the CPU starts up.
Here's a wacko idea: for systems that use LPC memory, you can use a "biossaviour" like plugin board, with not just flash but also a superio chip on it. Only useful for developers of course, not for the end user.
On systems where an I2C controller is easily reachable at boot time, you can use that (if you can't find a header to connect your debug cable to, use a DIMM slot :-) ).
Segher