[coreboot] riscv: How to debug

[王翔]

I try to debug coreboot with **spike**. 
I has apply the **8250 usart patch** to **spike**.
But I get from the official website of the code can not pass the test.
I found some BUG when I debug this.
I want to submit the code but I can't test it. What can i do,  who can help me.

I get code from `https://review.coreboot.org/coreboot.git%60

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王翔

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广州市腾御安信息科技有限公司

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