Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1756
-gerrit
commit e40257b67ab33ed1091e40a7b3b11ac845d9ae88 Author: Stefan Reinauer reinauer@chromium.org Date: Thu Sep 27 12:42:15 2012 -0700
ifdtool: Dump more registers from FD
Only thing not decoded now are the PCH straps
ifdtool -d path/to/image.bin File path/to/image.bin is 4096 bytes Found Flash Descriptor signature at 0x00000010 FLMAP0: 0x02040003 NR: 2 FRBA: 0x40 NC: 1 FCBA: 0x30 FLMAP1: 0x12100206 ISL: 0x12 FPSBA: 0x100 NM: 2 FMBA: 0x60 FLMAP2: 0x00210120 PSL: 0x2101 FMSBA: 0x200 FLUMAP1: 0x000004df Intel ME VSCC Table Length (VTL): 4 Intel ME VSCC Table Base Address (VTBA): 0x000df0
ME VSCC table: JID0: 0x001740ef SPI Componend Device ID 1: 0x17 SPI Componend Device ID 0: 0x40 SPI Componend Vendor ID: 0xef VSCC0: 0x20052005 Lower Erase Opcode: 0x20 Lower Write Enable on Write Status: 0x50 Lower Write Status Required: No Lower Write Granularity: 64 bytes Lower Block / Sector Erase Size: 4KB Upper Erase Opcode: 0x20 Upper Write Enable on Write Status: 0x50 Upper Write Status Required: No Upper Write Granularity: 64 bytes Upper Block / Sector Erase Size: 4KB JID1: 0x001720c2 SPI Componend Device ID 1: 0x17 SPI Componend Device ID 0: 0x20 SPI Componend Vendor ID: 0xc2 VSCC1: 0x20052005 Lower Erase Opcode: 0x20 Lower Write Enable on Write Status: 0x50 Lower Write Status Required: No Lower Write Granularity: 64 bytes Lower Block / Sector Erase Size: 4KB Upper Erase Opcode: 0x20 Upper Write Enable on Write Status: 0x50 Upper Write Status Required: No Upper Write Granularity: 64 bytes Upper Block / Sector Erase Size: 4KB
OEM Section: 00: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 10: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Found Region Section FLREG0: 0x00000000 Flash Region 0 (Flash Descriptor): 00000000 - 00000fff FLREG1: 0x07ff0180 Flash Region 1 (BIOS): 00180000 - 007fffff FLREG2: 0x017f0001 Flash Region 2 (Intel ME): 00001000 - 0017ffff FLREG3: 0x00001fff Flash Region 3 (GbE): 00fff000 - 00000fff (unused) FLREG4: 0x00001fff Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused)
Found Component Section FLCOMP 0x64900024 Dual Output Fast Read Support: supported Read ID/Read Status Clock Frequency: 50MHz Write/Erase Clock Frequency: 50MHz Fast Read Clock Frequency: 50MHz Fast Read Support: supported Read Clock Frequency: 20MHz Component 2 Density: 8MB Component 1 Density: 8MB FLILL 0x000060c7 Invalid Instruction 3: 0x00 Invalid Instruction 2: 0x00 Invalid Instruction 1: 0x60 Invalid Instruction 0: 0xc7 FLPB 0x00000000 Flash Partition Boundary Address: 0x000000
Found PCH Strap Section PCHSTRP0: 0x0820d602 PCHSTRP1: 0x0000010f PCHSTRP2: 0x00560000 PCHSTRP3: 0x00000000 PCHSTRP4: 0x00c8e000 PCHSTRP5: 0x00000000 PCHSTRP6: 0x00000000 PCHSTRP7: 0xc0001ae0 PCHSTRP8: 0x00000000 PCHSTRP9: 0x30000580 PCHSTRP10: 0x00410044 PCHSTRP11: 0x99000097 PCHSTRP12: 0x00000000 PCHSTRP13: 0x00000000 PCHSTRP14: 0x00000000 PCHSTRP15: 0x0000033e PCHSTRP16: 0x00000000 PCHSTRP17: 0x00000002
Found Master Section FLMSTR1: 0x0a0b0000 (Host CPU/BIOS) Platform Data Region Write Access: disabled GbE Region Write Access: enabled Intel ME Region Write Access: disabled Host CPU/BIOS Region Write Access: enabled Flash Descriptor Write Access: disabled Platform Data Region Read Access: disabled GbE Region Read Access: enabled Intel ME Region Read Access: disabled Host CPU/BIOS Region Read Access: enabled Flash Descriptor Read Access: enabled Requester ID: 0x0000
FLMSTR2: 0x0c0d0000 (Intel ME) Platform Data Region Write Access: disabled GbE Region Write Access: enabled Intel ME Region Write Access: enabled Host CPU/BIOS Region Write Access: disabled Flash Descriptor Write Access: disabled Platform Data Region Read Access: disabled GbE Region Read Access: enabled Intel ME Region Read Access: enabled Host CPU/BIOS Region Read Access: disabled Flash Descriptor Read Access: enabled Requester ID: 0x0000
FLMSTR3: 0x08080118 (GbE) Platform Data Region Write Access: disabled GbE Region Write Access: enabled Intel ME Region Write Access: disabled Host CPU/BIOS Region Write Access: disabled Flash Descriptor Write Access: disabled Platform Data Region Read Access: disabled GbE Region Read Access: enabled Intel ME Region Read Access: disabled Host CPU/BIOS Region Read Access: disabled Flash Descriptor Read Access: disabled Requester ID: 0x0118
Found Processor Strap Section ????: 0x00000000 ????: 0xffffffff ????: 0xffffffff ????: 0xffffffff
Change-Id: I68a613df2fd80e097cdea46fbad104d7c73ac9ad Signed-off-by: Stefan Reinauer reinauer@google.com --- util/ifdtool/ifdtool.c | 137 +++++++++++++++++++++++++++++++++++++++++++++---- util/ifdtool/ifdtool.h | 15 ++++++ 2 files changed, 141 insertions(+), 11 deletions(-)
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index 7655fd4..9eadc0a 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -49,10 +49,6 @@ static fdbar_t *find_fd(char *image, int size) return (fdbar_t *) (image + i); }
-typedef struct { - int base, limit, size; -} region_t; - static region_t get_region(frba_t *frba, int region_type) { region_t region; @@ -125,14 +121,27 @@ static const char *region_filename(int region_type) return region_filenames[region_type]; }
+static void dump_region(int num, frba_t *frba) +{ + region_t region = get_region(frba, num); + printf(" Flash Region %d (%s): %08x - %08x %s\n", + num, region_name(num), region.base, region.limit, + region.size < 1 ? "(unused)" : ""); +} + static void dump_frba(frba_t * frba) { - printf("\nFound Region Section\n"); + printf("Found Region Section\n"); printf("FLREG0: 0x%08x\n", frba->flreg0); + dump_region(0, frba); printf("FLREG1: 0x%08x\n", frba->flreg1); + dump_region(1, frba); printf("FLREG2: 0x%08x\n", frba->flreg2); + dump_region(2, frba); printf("FLREG3: 0x%08x\n", frba->flreg3); + dump_region(3, frba); printf("FLREG4: 0x%08x\n", frba->flreg4); + dump_region(4, frba); }
static void decode_spi_frequency(unsigned int freq) @@ -200,7 +209,17 @@ static void dump_fcba(fcba_t * fcba) decode_component_density(fcba->flcomp & 7); printf("\n"); printf("FLILL 0x%08x\n", fcba->flill); - printf("FLPB 0x%08x\n\n", fcba->flpb); + printf(" Invalid Instruction 3: 0x%02x\n", + (fcba->flill >> 24) & 0xff); + printf(" Invalid Instruction 2: 0x%02x\n", + (fcba->flill >> 16) & 0xff); + printf(" Invalid Instruction 1: 0x%02x\n", + (fcba->flill >> 8) & 0xff); + printf(" Invalid Instruction 0: 0x%02x\n", + fcba->flill & 0xff); + printf("FLPB 0x%08x\n", fcba->flpb); + printf(" Flash Partition Boundary Address: 0x%06x\n\n", + (fcba->flpb & 0xfff) << 12); }
static void dump_fpsba(fpsba_t * fpsba) @@ -221,7 +240,9 @@ static void dump_fpsba(fpsba_t * fpsba) printf("PCHSTRP12: 0x%08x\n", fpsba->pchstrp12); printf("PCHSTRP13: 0x%08x\n", fpsba->pchstrp13); printf("PCHSTRP14: 0x%08x\n", fpsba->pchstrp14); - printf("PCHSTRP15: 0x%08x\n\n", fpsba->pchstrp15); + printf("PCHSTRP15: 0x%08x\n", fpsba->pchstrp15); + printf("PCHSTRP16: 0x%08x\n", fpsba->pchstrp16); + printf("PCHSTRP17: 0x%08x\n\n", fpsba->pchstrp17); }
static void decode_flmstr(uint32_t flmstr) @@ -272,6 +293,95 @@ static void dump_fmsba(fmsba_t * fmsba) printf("????: 0x%08x\n", fmsba->data[3]); }
+static void dump_jid(uint32_t jid) +{ + printf(" SPI Componend Device ID 1: 0x%02x\n", + (jid >> 16) & 0xff); + printf(" SPI Componend Device ID 0: 0x%02x\n", + (jid >> 8) & 0xff); + printf(" SPI Componend Vendor ID: 0x%02x\n", + jid & 0xff); +} + +static void dump_vscc(uint32_t vscc) +{ + printf(" Lower Erase Opcode: 0x%02x\n", + vscc >> 24); + printf(" Lower Write Enable on Write Status: 0x%02x\n", + vscc & (1 << 20) ? 0x06 : 0x50); + printf(" Lower Write Status Required: %s\n", + vscc & (1 << 19) ? "Yes" : "No"); + printf(" Lower Write Granularity: %d bytes\n", + vscc & (1 << 18) ? 64 : 1); + printf(" Lower Block / Sector Erase Size: "); + switch ((vscc >> 16) & 0x3) { + case 0: + printf("256 Byte\n"); + break; + case 1: + printf("4KB\n"); + break; + case 2: + printf("8KB\n"); + break; + case 3: + printf("64KB\n"); + break; + } + + printf(" Upper Erase Opcode: 0x%02x\n", + (vscc >> 8) & 0xff); + printf(" Upper Write Enable on Write Status: 0x%02x\n", + vscc & (1 << 4) ? 0x06 : 0x50); + printf(" Upper Write Status Required: %s\n", + vscc & (1 << 3) ? "Yes" : "No"); + printf(" Upper Write Granularity: %d bytes\n", + vscc & (1 << 2) ? 64 : 1); + printf(" Upper Block / Sector Erase Size: "); + switch (vscc & 0x3) { + case 0: + printf("256 Byte\n"); + break; + case 1: + printf("4KB\n"); + break; + case 2: + printf("8KB\n"); + break; + case 3: + printf("64KB\n"); + break; + } +} + +static void dump_vtba(vtba_t *vtba, int vtl) +{ + int i; + int num = (vtl >> 1) < 8 ? (vtl >> 1) : 8; + + printf("ME VSCC table:\n"); + for (i = 0; i < num; i++) { + printf(" JID%d: 0x%08x\n", i, vtba->entry[i].jid); + dump_jid(vtba->entry[i].jid); + printf(" VSCC%d: 0x%08x\n", i, vtba->entry[i].vscc); + dump_vscc(vtba->entry[i].vscc); + } + printf("\n"); +} + +static void dump_oem(uint8_t *oem) +{ + int i, j; + printf("OEM Section:\n"); + for (i = 0; i < 4; i++) { + printf("%02x:", i << 4); + for (j = 0; j < 16; j++) + printf(" %02x", oem[(i<<4)+j]); + printf ("\n"); + } + printf ("\n"); +} + static void dump_fd(char *image, int size) { fdbar_t *fdb = find_fd(image, size); @@ -295,7 +405,14 @@ static void dump_fd(char *image, int size) printf(" FMSBA: 0x%x\n", ((fdb->flmap2) & 0xff) << 4);
printf("FLUMAP1: 0x%08x\n", fdb->flumap1); - + printf(" Intel ME VSCC Table Length (VTL): %d\n", + (fdb->flumap1 >> 8) & 0xff); + printf(" Intel ME VSCC Table Base Address (VTBA): 0x%06x\n\n", + (fdb->flumap1 & 0xff) << 4); + dump_vtba((vtba_t *) + (image + ((fdb->flumap1 & 0xff) << 4)), + (fdb->flumap1 >> 8) & 0xff); + dump_oem((uint8_t *)image + 0xf00); dump_frba((frba_t *) (image + (((fdb->flmap0 >> 16) & 0xff) << 4))); dump_fcba((fcba_t *) (image + (((fdb->flmap0) & 0xff) << 4))); @@ -318,9 +435,7 @@ static void write_regions(char *image, int size)
for (i = 0; i<5; i++) { region_t region = get_region(frba, i); - printf("Flash Region %d (%s): %08x - %08x %s\n", - i, region_name(i), region.base, region.limit, - region.size < 1 ? "(unused)" : ""); + dump_region(i, frba); if (region.size > 0) { int region_fd; region_fd = open(region_filename(i), diff --git a/util/ifdtool/ifdtool.h b/util/ifdtool/ifdtool.h index db237a3..7537f1d 100644 --- a/util/ifdtool/ifdtool.h +++ b/util/ifdtool/ifdtool.h @@ -79,6 +79,8 @@ typedef struct { uint32_t pchstrp13; uint32_t pchstrp14; uint32_t pchstrp15; + uint32_t pchstrp16; + uint32_t pchstrp17; } __attribute__((packed)) fpsba_t;
// master @@ -93,4 +95,17 @@ typedef struct { uint32_t data[8]; } __attribute__((packed)) fmsba_t;
+// ME VSCC +typedef struct { + uint32_t jid; + uint32_t vscc; +} vscc_t; + +typedef struct { + // Actual number of entries specified in vtl + vscc_t entry[8]; +} vtba_t;
+typedef struct { + int base, limit, size; +} region_t;