[coreboot] Re: Baytrail issue to communicate with superios.

[Rudolf Marek]

Hi Jose,

Dne 06. 12. 23 v 15:31 Jose Trujillo via coreboot napsal(a):
> Dear Rudolf/All,
>
> Today I patched superiotool to add support for Fintek F81803A and dumped both superios, and I found that LPC clock must be set at 24MHz on Fintek global control register #26 from the default 48MHz.

That is strange. I would expect that this problem is visible already in your little TX test to send 0x42. If the clock
is 2x off the baudrate would be also 2x off.

Thanks,
Rudolf