[coreboot] r3821 - trunk/coreboot-v2/src/mainboard/jetway/j7f24

Author: cozzie
Date: 2008-12-19 04:33:37 +0100 (Fri, 19 Dec 2008)
New Revision: 3821

Modified:
   trunk/coreboot-v2/src/mainboard/jetway/j7f24/auto.c
Log:
I honestly have no idea if the previous use of the vt8235's serial functions
worked or not, but my board doesn't have COM1, and those function don't
support using COM2, so I've changed auto.c to use the fintek f71805f
functions, the fintek is the onboard super io. I also cleaned up a
whitespace issue and unused variable.

Signed-off-by: Corey Osgood 
Acked-by: Peter Stuge

Modified: trunk/coreboot-v2/src/mainboard/jetway/j7f24/auto.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/jetway/j7f24/auto.c	2008-12-18 19:53:11 UTC (rev 3820)
+++ trunk/coreboot-v2/src/mainboard/jetway/j7f24/auto.c	2008-12-19 03:33:37 UTC (rev 3821)
@@ -38,8 +38,14 @@
 #include "lib/delay.c"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
-#include "southbridge/via/vt8235/vt8235_early_serial.c"
+#include "superio/fintek/f71805f/f71805f_early_serial.c"

+#if TTYS0_BASE == 0x2f8
+#define SERIAL_DEV PNP_DEV(0x2e, F71805F_SP2)
+#else
+#define SERIAL_DEV PNP_DEV(0x2e, F71805F_SP1)
+#endif
+
 static void memreset_setup(void)
 {
 }
@@ -54,8 +60,7 @@
 static void enable_mainboard_devices(void)
 {
    device_t dev;
-	u8 reg;
- 
+
    dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
    if (dev == PCI_DEV_INVALID)
    	die("Southbridge not found!!!\n");
@@ -96,7 +101,7 @@
    /* Enable multifunction for northbridge. */
    pci_write_config8(ctrl.d0f0, 0x4f, 0x01);

-	enable_vt8235_serial();
+	f71805f_enable_serial(SERIAL_DEV, TTYS0_BASE);
    uart_init();
    console_init();