Dear Kyösti, dear coreboot folks,
Am 11.02.20 um 16:11 schrieb Paul Menzel:
On 2020-01-25 00:56, Kyösti Mälkki wrote:
System *boots* with one of:
- maxcpus=0 (equivalent nosmp)
- nolapic (with e1000 warning about missing MSI-X
System does *not* boot with one of:
Booting with `maxcpus=1` and then starting the second CPU also results in a hang.
echo 1 | sudo tee /sys/devices/system/cpu/cpu0/online
I thought SMP was generally not compatible with PIC IRQ routing (which noapic enforces?) and this would explain case 2.
As for case 1, maybe I missed some detail with my commit  when switching from LAPIC to TSC timers. Like leaving LAPIC timers running at different rate or generally having the timer counters too much out-of-sync across CPU #0 and #1. You could try if that one is the commit with regression.
Yes, you are spot on.
Building the parent commit c00e2fb996 (cpu/intel: Use CPU_INTEL_COMMON_TIMEBASE) the system boots with both CPUs.
It turns out, that my conclusion was incorrect, and this wasn’t enough to actually find the change introducing the regression. Yesterday, a Lenovo T60 user finished bisecting the problem after Nico encouraged it, and it turns out that commit c1dc2d5e68 (mb/lenovo/t60: Switch to override tree)  was incomplete. Nico found the problem, and submitted a fix . That also explains, why the problem was only seen on the Lenovo T60 (and possibly variants), and not other Intel 945 device users.
Sorry for not going all the way in the beginning.