Re: [coreboot] patch: fix interupts for MFGPT for alix1c and alix2c3

[Carl-Daniel Hailfinger]

On 09.05.2008 23:26, ron minnich wrote:
> attached. Thanks again to Marc and Jordan and of course AMD.
>
> ron
>
> This is the fix for MFGPT on those boards which have a cs5536 and ALSO 
> have a superio.
>
> With this patch, alix1c and MFGPT work fine. Still need to test on Alix2c3, but it 
> is likely it will work.
>
> Thanks to Marc and Jordan for this one.
>
> Signed-off-by: Ronald G. Minnich

Acked-by: Carl-Daniel Hailfinger

Thanks to Ron, Marc, Jordan!

One minor nitpick, though:
> Index: mainboard/pcengines/alix1c/dts
>
> --- mainboard/pcengines/alix1c/dts	(revision 681)
> +++ mainboard/pcengines/alix1c/dts	(working copy)
> @@ -36,9 +36,9 @@
>    		/config/("southbridge/amd/cs5536/dts");
>    		/* Interrupt enables for LPC bus.
>    		 *  Each bit is an IRQ 0-15. */
> 	lpc_serirq_enable = "0x000010da";
> 	lpc_serirq_enable = "0x0000105a";
> /* LPC IRQ polarity. Each bit is an IRQ 0-15. */
> 	lpc_serirq_polarity = "0x0000EF25";
> 	lpc_serirq_polarity = "0x0000EFa5";

Inconsistent capitalization of hex digits.
> 	/* 0:continuous 1:quiet */
> 	lpc_serirq_mode = "1";
> 	/* GPIO(0-0x20) for INT D:C:B:A, 0xFF=none. 
> Index: mainboard/pcengines/alix2c3/dts
>
> --- mainboard/pcengines/alix2c3/dts	(revision 681)
> +++ mainboard/pcengines/alix2c3/dts	(working copy)
> @@ -34,9 +34,9 @@
>    		/config/("southbridge/amd/cs5536/dts");
>    		/* Interrupt enables for LPC bus.
>    		 *  Each bit is an IRQ 0-15. */
> 	lpc_serirq_enable = "0x000010da";
> 	lpc_serirq_enable = "0x0000105a";
> /* LPC IRQ polarity. Each bit is an IRQ 0-15. */
> 	lpc_serirq_polarity = "0x0000EF25";
> 	lpc_serirq_polarity = "0x0000EFa5";

Same here.
> 	/* 0:continuous 1:quiet */
> 	lpc_serirq_mode = "1";
> 	/* GPIO(0-0x20) for INT D:C:B:A, 0xFF=none. 

Can we decide on one way to write hex digits (all/no caps) and keep all
dts conformant?

Regards,
Carl-Daniel