The Pistachio and DBM690T ACPI code uses MMCONFIG to access southbridge PCI config registers. This fails because we explicitly disable MMCONFIG accesses with disable_pcie_bar3(). The comments in the code state that coreboot is expected to reenable MMCONFIG, but that never happens.
This patch is a totally ugly workaround, but it fixes the ACPI code for me.
To verify the fix or create a better fix, please boot Linux with the boot parameter acpi.debug_level=0x10807 and look for the string "E0090024" in dmesg. If you can't find that string, please recompile your kernel with CONFIG_ACPI_DEBUG=y
Broken: evregion-0398 [00] ev_address_space_dispa: Handler ffff8800773c9ae0 (@ffffffff803a9598) Address 00000000E0090024 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff8800773c9ae0 (@ffffffff803a9598) Address 00000000E0090025 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff8800773c9ae0 (@ffffffff803a9598) Address 00000000E0090026 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff8800773c9ae0 (@ffffffff803a9598) Address 00000000E0090027 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff8800773c9ae0 (@ffffffff803a9598) Address 0000000100000128 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff8800773c9ae0 (@ffffffff803a9598) Address 00000001000001A8 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff8800773c9ae0 (@ffffffff803a9598) Address 0000000100000228 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff8800773c9ae0 (@ffffffff803a9598) Address 00000001000002A8 [SystemMemory]
OK: evregion-0398 [00] ev_address_space_dispa: Handler ffff88013fad5ae0 (@ffffffff803a9598) Address 00000000E0090024 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff88013fad5ae0 (@ffffffff803a9598) Address 00000000E0090025 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff88013fad5ae0 (@ffffffff803a9598) Address 00000000E0090026 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff88013fad5ae0 (@ffffffff803a9598) Address 00000000E0090027 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff88013fad5ae0 (@ffffffff803a9598) Address 00000000FC409129 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff88013fad5ae0 (@ffffffff803a9598) Address 00000000FC4091A9 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff88013fad5ae0 (@ffffffff803a9598) Address 00000000FC409229 [SystemMemory] evregion-0398 [00] ev_address_space_dispa: Handler ffff88013fad5ae0 (@ffffffff803a9598) Address 00000000FC4092A9 [SystemMemory]
Note that the broken version tries to access memory above 4 GB. The correct version accesses SATA_BAR5 instead.
I don't know the correct place to re-enable MMCONFIG access.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: LinuxBIOSv2-asus_m2a-vm/src/boot/hardwaremain.c =================================================================== --- LinuxBIOSv2-asus_m2a-vm/src/boot/hardwaremain.c (Revision 4010) +++ LinuxBIOSv2-asus_m2a-vm/src/boot/hardwaremain.c (Arbeitskopie) @@ -36,7 +36,9 @@ #include <part/hard_reset.h> #include <part/init_timer.h> #include <boot/elf.h> +#include "../southbridge/amd/rs690/rs690.h"
+ /** * @brief Main function of the DRAM part of coreboot. * @@ -49,6 +51,7 @@ void hardwaremain(int boot_complete) { struct lb_memory *lb_mem; + device_t nb_dev;
post_code(0x80);
@@ -83,6 +86,8 @@ dev_initialize(); post_code(0x89);
+ nb_dev = dev_find_slot(0, PCI_DEVFN(0, 0)); + enable_pcie_bar3(nb_dev); /* PCIEMiscInit */ /* Now that we have collected all of our information * write our configuration tables. */