On 27.10.2007 03:27, Carl-Daniel Hailfinger wrote:
Oh, and here is a nice dmesg diff snippet:
--- dmesg.vendor 2007-10-27 03:11:10.000000000 +0200 +++ dmesg.LB 2007-10-27 03:11:10.000000000 +0200
- PREFETCH window: disabled.
+PCI: Bridge: 0000:00:0a.0
- IO window: disabled.
- MEM window: disabled.
- PREFETCH window: disabled.
+PCI: Bridge: 0000:00:0b.0
- IO window: disabled.
- MEM window: disabled.
- PREFETCH window: disabled.
+PCI: Bridge: 0000:00:0c.0
- IO window: disabled.
- MEM window: disabled.
- PREFETCH window: disabled.
+PCI: Bridge: 0000:00:0d.0
- IO window: disabled.
- MEM window: disabled.
- PREFETCH window: disabled.
+PCI: Bridge: 0000:00:0e.0
- IO window: disabled.
- MEM window: disabled. PREFETCH window: disabled.
Notice all these added PCI bridges. Fix.
Try this diff (whitespace-damaged):
Index: src/mainboard/gigabyte/m57sli/Config.lb =================================================================== --- src/mainboard/gigabyte/m57sli/Config.lb (Revision 2899) +++ src/mainboard/gigabyte/m57sli/Config.lb (Arbeitskopie) @@ -305,6 +305,7 @@ device i2c 57 on end end end # SM +#wtf?!? we already have device pci 1.1 in the section above device pci 1.1 on # SM 1 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? # chip drivers/generic/generic #PCIXA Slot1 @@ -340,11 +341,12 @@ device pci 6.1 on end # AZA device pci 8.0 on end # NIC device pci 9.0 off end # NIC - device pci a.0 on end # PCI E 5 - device pci b.0 on end # PCI E 4 - device pci c.0 on end # PCI E 3 - device pci d.0 on end # PCI E 2 - device pci e.0 on end # PCI E 1 +#hope not mentioning these should be sufficient +# device pci a.0 on end # PCI E 5 +# device pci b.0 on end # PCI E 4 +# device pci c.0 on end # PCI E 3 +# device pci d.0 on end # PCI E 2 +# device pci e.0 on end # PCI E 1 device pci f.0 on end # PCI E 0 register "ide0_enable" = "1" register "sata0_enable" = "1"
Someone should read the Config.lb thoroughly and check its internal consistency and validity.
Carl-Daniel