Re: [coreboot] i2c_writeb vs i2c_raw_write output

[Haleigh Novak]

?Thank you Julius for the explanation, I really appreciate it especially since in my googling I didn't manage to gather the information you provided in your last paragraph. Also thank you both Duncan and Kyösti for the suggestions/direction for my continuation of this project, I will defiantly look into the smbuss_xxx() functions. And thank you as well Punit for bringing the writing requirements back to forefront. Thank you again everyone I really appreciate it.

HN

________________________________
From: Kyösti Mälkki 
Sent: Saturday, October 8, 2016 7:57 PM
To: Duncan Laurie
Cc: Julius Werner; Haleigh Novak; coreboot
Subject: Re: [coreboot] i2c_writeb vs i2c_raw_write output

On Sun, Oct 9, 2016 at 2:09 AM, Duncan Laurie <[e-mail]> wrote:

On Fri, Oct 7, 2016 at 5:51 PM, Julius Werner <[e-mail]> wrote:
Also, I think all of these functions only work on non-x86 devices
right now so they're probably not really helpful to you (I'd be
surprised if they even compile and link for your board). The I2C API
is unfortunately one of those areas where x86 and non-x86 coreboot
still lead very separate side-by-side lives right now. For x86 you
probably need the i2c_dev_xxx() functions, which should in theory work

Skylake and Apollolake do support the I2C API and associated convenience functions. (finally!)  The i2c driver used is common for intel chipsets since haswell(core) and baytrail(atom), it just needs a bit of glue layer to map bus number to a base address.

I added the i2c_dev_* variants around the same time in order to support drivers where the bus+address comes from devicetree, but the functions that take a bus+address will work too.

similar but I have no experience with them. You might also need to use
the smbus_xxx() functions instead (SMBUS is some
kinda-the-same-but-not-quite thing related to I2C on x86 that I never
bothered to fully understand).

I agree this is likely what is needed for the ASROCK IMB-A180 as it looks like there is an smbus driver in the southbridge.  Look for i2c_smbus_send_byte() in include/device/smbus.h which is implemented in southbridge/amd/agesa/hudson/smbus.c

-duncan

I have not used this particular Beagle i2c/spi reade. As part of the protocol, i2c/smbus master expects there is a slave device that first acknowledges it address, and then also each byte you send to it. Maybe this Beagle has a switch for that, but I think it acts more as LA just snooping on the bus.

So you may need to add an actual i2c device (micro or PCF8574) on the bus for the master side to work at all.

Kyösti

On Thu, Sep 29, 2016 at 3:10 PM, Haleigh Novak <[e-mail]> wrote:
> Hello All,
>
> I am currently trying to send POST codes from Coreboot (downloaded
> approximately a month ago) to a Beagle I2C/SPI reader, specifically via i2c.
> I don't know the register needed for i2c_writeb() so I figured I would use
> i2c_raw_write(). In general since I have been unable to locate anything
> explaining the difference between the two functions I would really
> appriciate it if someone could explain it or direct me to where I can find
> documentation. I am hoping that the explaination/resource will either tell
> me where / or direct me to how I can figure out where the i2c_raw_write will
> write to (if it will just write directly to the Beagle or somewhere else)?
> Or would it be better to send it to a register with i2c_writeb()? I am
> running Coreboot on an ASROCK Mainboard, model IMB-A180.
>
> Thank you.
>
> HN