Re: [coreboot] qemu dts fixes

[Myles Watson]

On Tue, Dec 2, 2008 at 8:05 PM, Marc Jones  wrote:
> On Tue, Dec 2, 2008 at 10:57 AM, Myles Watson  wrote:
> > On Tue, Dec 2, 2008 at 7:13 AM, Myles Watson  wrote:
> > > Jordan,
> > >
> > > Sorry I obviously missed the point of your questions.  I'd forgotten
>
> that
> > > the fix went in to make all devices found in the dts be "on the
>
> mainboard."
> > > Here's a new patch that updates the dts with that in mind.  It also
>
> fixes
> > > the subsystem_vendor, which was broken in the last patch.
> > >
> > > I appreciate the sanity check.
> >
> > This patch is updated so that qemu works with resource allocation in
>
> phases.
> > Here are the changes:
> > Add a dts for the northbridge so it can have its own ops.
> > Separates the domain from the device resource code.
> > Add new resources for the APIC and VGA area.
>
> Move the IOAPIC to the the 82371? I'm not sure if the LAPIC belongs in
> the northbridge on since every core needs one it might belong in the
> CPU but I think you only need to reserve the range once.

Can we put the LAPIC in the NB domain?  Hopefully we can reserve an area
that would cover any CPU connected to that NB.  Here's my current resource
list for qemu.  This is after resource assignment.

PCI_DOMAIN: 0000 resource base 1000 size 410 align 8 gran 0 limit ffff
flags 80100 index 0
  PCI_DOMAIN: 0000 resource base fc000000 size 2001000 align 25 gran 0 limit
ffffffff flags 80200 index 1
  PCI_DOMAIN: 0000 resource base fec00000 size 100000 align 0 gran 0 limit
ffffffff flags e0000200 index 2
  PCI_DOMAIN: 0000 resource base fee00000 size 10000 align 0 gran 0 limit
ffffffff flags e0000200 index 3
   PCI: 00:00.0 resource base 0 size 0 align 0 gran 12 limit ffff flags
80100 index 0
   PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags
e0004200 index a
   PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit bfff
flags c0040200 index 1
   PCI: 00:00.0 resource base c0000 size 6f40000 align 0 gran 0 limit 0
flags e0004200 index b
   PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags
e0000100 index 0
   PCI: 00:01.1 resource base 1400 size 10 align 4 gran 4 limit ffff flags
40000100 index 20
   PCI: 00:02.0 resource base fc000000 size 2000000 align 25 gran 25 limit
ffffffff flags 40001200 index 10
   PCI: 00:02.0 resource base fe000000 size 1000 align 12 gran 12 limit
ffffffff flags 40000200 index 14
   PCI: 00:03.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags
40000100 index 10

Which APIC resource did you want to move into the 82371?

Thanks,
Myles