Marc Jones wrote:
yhlu wrote:
my own tree have
#if CacheSize < 0x8000 /* enable caching for 16K/8K/4K using fixed mtrr */ movl $0x269, %ecx /* fix4k_cc000*/ #if CacheSize == 0x4000 movl $0x06060606, %edx /* WB IO type */ #endif #if CacheSize == 0x2000 movl $0x06060000, %edx /* WB IO type */ #endif #if CacheSize == 0x1000 movl $0x06000000, %edx /* WB IO type */ #endif xorl %eax, %eax wrmsr #endif
maybe i didn't post sth...
This is in the v2 code but not in v3.
normally we can use 4k only at first.
run_time decide is not good. for example REV E, you could use 64k. for for REV F you can only use 48K.
So this is still a problem since 48K isn't an option and it isn't a power of 2 so I was incorrect on that point.
It would be good to have an automatic runtime setting for each CPU that could be adjusted by a mainboard override.
Family 10h need more tricks.
These changes are coming soon.
Marc
Also, 48K is an option in v2. It seems that v3 should be brought up to date with v2 first. Marc