On Mon, Dec 15, 2008 at 4:27 PM, Gsellmann Peter Peter.Gsellmann@automationx.com wrote:
$ sudo /usr/local/sbin/flashrom Calibrating delay loop... OK. No coreboot table found. Found chipset "VIA VT82C686A/B", enabling flash write... OK. Found chip "EON EN29F002(A)(N)T" (256 KB) at physical address 0xfffc0000. No operations were specified.
For memory mapped flash chips, flashrom knows it should look for base address info and probe chips there. However, for SPI, flashrom only probes chips at address 0x0 of the 24-bit SPI address space. That is not always correct.
ICH7 supports flash sharing between BIOS and on-board network controller. For (my) intel ICH7 desktop board, the vendor bios sets the rom at the top of the SPI address space, even though BIOS has taken the whole chip. The BIOS base address is thus 0x1 0000 0000 - (flash total size). Any SPI command sent to an address below that will be blocked and we only get "Transaction error!" running flashrom.
yu ning