Sven Schnelle (svens@stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/601
-gerrit
commit cb54abee3ffa57e67f2803a79ed2ce8a612fa2b9 Author: Sven Schnelle svens@stackframe.org Date: Tue Jan 31 22:44:53 2012 +0100
i3100: add sata_ports_implemented option
BIOS needs to set the bit mask which ports are iplemented on the board. Without setting this option, seabios fails to boot from SATA.
Change-Id: I21de3fde3a9cff7c590226f70fa549274f36e2a8 Signed-off-by: Sven Schnelle svens@stackframe.org --- src/southbridge/intel/i3100/chip.h | 1 + src/southbridge/intel/i3100/sata.c | 11 ++++++++++- 2 files changed, 11 insertions(+), 1 deletions(-)
diff --git a/src/southbridge/intel/i3100/chip.h b/src/southbridge/intel/i3100/chip.h index f35e4a8..7e58674 100644 --- a/src/southbridge/intel/i3100/chip.h +++ b/src/southbridge/intel/i3100/chip.h @@ -43,6 +43,7 @@ struct southbridge_intel_i3100_config
/* GPIO use select */ u8 gpio[64]; + int sata_ports_implemented; u32 pirq_a_d; u32 pirq_e_h; }; diff --git a/src/southbridge/intel/i3100/sata.c b/src/southbridge/intel/i3100/sata.c index 1925f88..2341ca1 100644 --- a/src/southbridge/intel/i3100/sata.c +++ b/src/southbridge/intel/i3100/sata.c @@ -31,7 +31,14 @@ typedef struct southbridge_intel_i3100_config config_t;
static void sata_init(struct device *dev) { - u8 ahci; + u8 ahci; + u32 *ahci_bar; + config_t *config = dev->chip_info; + + if (config == NULL) { + printk(BIOS_ERR, "i3100_sata: error: device not in devicetree.cb!\n"); + return; + }
/* Get the chip configuration */ ahci = (pci_read_config8(dev, SATA_MAP) >> 6) & 0x03; @@ -58,6 +65,8 @@ static void sata_init(struct device *dev) /* IDE I/O configuration */ pci_write_config32(dev, SATA_IIOC, 0);
+ ahci_bar = (u32 *)(pci_read_config32(dev, 0x27) & ~0x3ff); + ahci_bar[3] = config->sata_ports_implemented; } else { /* SATA configuration */ pci_write_config8(dev, SATA_CMD, 0x07);