On Mon, Nov 10, 2003 at 12:45:27PM -0000, Peter Fox wrote:
I don't think so. It is the 486 core in an stpc elite. It just claims Industry standard 486 compatibility.
In their published instruction set summary, which appears to be in alphabetical order, there is RCR, then REP INS.
Maybe RDTSC causes invalid opcode exception, and since there is no exception handler, the CPU resets.
filo/i386/timer.c must be re-written to support pre-Pentium CPUs.