Re: [coreboot] [FILO] EPIA-NL/CN400 Port.... FILO Booting kernel, init probs

[Konstantin Lazarev]

Harrison, Jon (SELEX GALILEO, UK) wrote:
> I'd appreciate any pointers as to what's going on,

Looks like PNP interrupt routing is broken. Check offset 0x3c in config space of your PCI devices and find what has interrupt routed to IRQ12 . Then go and check which IRQ corresponds to interrupt line used by that device (in B0D17F0 Rx55-57). Interrupt line depends on slot in which your device is inserted or assigned for internal devices. Then program correct values of IRQ in Rx3C of your device in pci_routing_fixup function of coreboot for your southbridge.

Regards,
Konstantin.