Hello: everyone, the gfx configured as 2 x8 slot, after link trained successfully, I printed the width , the value of which is 4. Does it means the link width is x8? from the function dual_port_configuration ...... switch (width) { case 1: case 2: nbpcie_ind_write_index(nb_dev, 0x65, cfg->gfx_lane_reversal ? 0x0000 : 0x0000); tgt_printf("file %s, func %s, line %d, dev_ind %d width %d\n", __FILE__, __func__, __LINE__, dev_ind, width); break; case 4: tgt_printf("file %s, func %s, line %d, dev_ind %d width %d\n", __FILE__, __func__, __LINE__, dev_ind, width); nbpcie_ind_write_index(nb_dev, 0x65, cfg->gfx_lane_reversal ? 0x0000 : 0x0000); break; ......
Both dev2 and dev3's link width are 4 (x8?). Then I boot linux use lspci -vvv as root, the result is
00:02.0 ...... LnkCap: Port #0, Speed 5GT/s, Width x8,...... ...... LnkSta: Speed 2.5GT/s, Width x2,......
It is the same to the dev3. The cb file is from src/mainboard/amd/mahogany_fam10/devicetree.cb
Anyone know about the link training of gfx of rs780e? Thanks.