Author: ruik Date: 2008-12-23 18:34:15 +0100 (Tue, 23 Dec 2008) New Revision: 3840
Modified: trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h trunk/coreboot-v2/src/include/stdlib.h trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/acpi_tables.c trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/dsdt.asl trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/fadt.c Log: The attached patch adds missing bits to ACPI to make Windows XP and Windows Vista happy.
The FADT bootarch flags Blacklists MSI for this chipset (maybe not needed) Adds modified amdk8_util.asl Adds the SSDT table to chain of tables Aligns the FACS correctly (this should be done for other boards) Adds the _CRS method to Asus M2V-MX SE acpi DSDT. Fixes the FACS table length.
Signed-off-by: Rudolf Marek r.marek@assembler.cz Acked-by: Myles Watson mylesgw@gmail.com
Modified: trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h =================================================================== --- trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h 2008-12-23 17:20:46 UTC (rev 3839) +++ trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h 2008-12-23 17:34:15 UTC (rev 3840) @@ -285,7 +285,7 @@ u32 x_firmware_waking_vector_l; u32 x_firmware_waking_vector_h; u8 version; - u8 resv[33]; + u8 resv[31]; } __attribute__ ((packed)) acpi_facs_t;
/* These are implemented by the target port */
Modified: trunk/coreboot-v2/src/include/stdlib.h =================================================================== --- trunk/coreboot-v2/src/include/stdlib.h 2008-12-23 17:20:46 UTC (rev 3839) +++ trunk/coreboot-v2/src/include/stdlib.h 2008-12-23 17:34:15 UTC (rev 3840) @@ -5,6 +5,9 @@
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
+#define ALIGN(x,a) __ALIGN_MASK(x,(typeof(x))(a)-1) +#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) + #define MIN(a,b) ((a) < (b) ? (a) : (b)) #define MAX(a,b) ((a) > (b) ? (a) : (b))
Modified: trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/acpi_tables.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/acpi_tables.c 2008-12-23 17:20:46 UTC (rev 3839) +++ trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/acpi_tables.c 2008-12-23 17:34:15 UTC (rev 3840) @@ -6,7 +6,7 @@ * * Copyright (C) 2004 Stefan Reinauer stepan@openbios.org * Copyright (C) 2005 Nick Barker nick.barker9@btinternet.com - * Copyright (C) 2007 Rudolf Marek r.marek@assembler.cz + * Copyright (C) 2007, 2008 Rudolf Marek r.marek@assembler.cz * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License v2 as published by @@ -32,6 +32,7 @@ #include <../../../southbridge/via/k8t890/k8t890.h>
extern unsigned char AmlCode[]; +extern unsigned char AmlCode_ssdt[];
unsigned long acpi_fill_mcfg(unsigned long current) { @@ -91,6 +92,8 @@ acpi_madt_t *madt; acpi_fadt_t *fadt; acpi_facs_t *facs; + acpi_slit_t *slit; + acpi_header_t *ssdt; acpi_header_t *dsdt;
/* Align ACPI tables to 16 byte. */ @@ -113,6 +116,10 @@
/* We explicitly add these tables later on: */ printk_debug("ACPI: * FACS\n"); + + /* we should align FACS to 64B as per ACPI specs */ + + current = ALIGN(current, 64); facs = (acpi_facs_t *) current; current += sizeof(acpi_facs_t); acpi_create_facs(facs); @@ -158,6 +165,24 @@ current += srat->header.length; acpi_add_table(rsdt, srat);
+ /* SLIT */ + printk_debug("ACPI: * SLIT\n"); + slit = (acpi_slit_t *) current; + acpi_create_slit(slit); + current+=slit->header.length; + acpi_add_table(rsdt,slit); + + /* SSDT */ + printk_debug("ACPI: * SSDT\n"); + ssdt = (acpi_header_t *)current; + current += ((acpi_header_t *)AmlCode_ssdt)->length; + memcpy((void *)ssdt, (void *)AmlCode_ssdt, ((acpi_header_t *)AmlCode_ssdt)->length); + update_ssdt((void*)ssdt); + /* recalculate checksum */ + ssdt->checksum = 0; + ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length); + acpi_add_table(rsdt,ssdt); + printk_info("ACPI: done.\n"); return current; }
Modified: trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c 2008-12-23 17:20:46 UTC (rev 3839) +++ trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c 2008-12-23 17:34:15 UTC (rev 3840) @@ -299,7 +299,6 @@ enable_fid_change(); print_debug("after enable_fid_change\r\n");
- /* FIXME does not work yet */ init_fidvid_bsp(bsp_apicid);
/* Stop the APs so we can start them later in init. */
Modified: trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/dsdt.asl =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/dsdt.asl 2008-12-23 17:20:46 UTC (rev 3839) +++ trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/dsdt.asl 2008-12-23 17:34:15 UTC (rev 3840) @@ -22,6 +22,9 @@
DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) { + Include ("amdk8_util.asl") + + /* Define the main processor.*/ Scope (_PR) { @@ -47,9 +50,45 @@ Name (_ADR, 0x00) Name (_UID, 0x00) Name (_BBN, 0x00) + + External (BUSN) + External (MMIO) + External (PCIO) + External (SBLK) + External (TOM1) + External (HCLK) + External (SBDN) + External (HCDN)
+ Method (_CRS, 0, NotSerialized) + { + Name (BUF0, ResourceTemplate () + { + IO (Decode16, + 0x0CF8, // Address Range Minimum + 0x0CF8, // Address Range Maximum + 0x01, // Address Alignment + 0x08, // Address Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Address Space Granularity + 0x0000, // Address Range Minimum + 0x0CF7, // Address Range Maximum + 0x0000, // Address Translation Offset + 0x0CF8, // Address Length + ,, , TypeStatic) + }) + /* Methods bellow use SSDT to get actual MMIO regs + The IO ports are from 0xd00, optionally an VGA, + otherwise the info from MMIO is used. + */ + Concatenate (_SB.GMEM (0x00, _SB.PCI0.SBLK), BUF0, Local1) + Concatenate (_SB.GIOR (0x00, _SB.PCI0.SBLK), Local1, Local2) + Concatenate (_SB.GWBN (0x00, _SB.PCI0.SBLK), Local2, Local3) + Return (Local3) + } + /* PCI Routing Table */ - /* aaa */ Name (_PRT, Package () { Package (0x04) { 0x000F0000, 0x01, 0x00, 0x15 }, /* 0xf SATA IRQ 21 */ Package (0x04) { 0x000F0001, 0x00, 0x00, 0x14 }, /* 0xf Native IDE IRQ 20 */
Modified: trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/fadt.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/fadt.c 2008-12-23 17:20:46 UTC (rev 3839) +++ trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/fadt.c 2008-12-23 17:34:15 UTC (rev 3840) @@ -75,10 +75,10 @@ fadt->day_alrm = 0x7d; fadt->mon_alrm = 0x7e; fadt->century = 0x32; - /* fixme 5 - 10 */ - fadt->iapc_boot_arch = 0x1; + /* We have legacy devices, 8042, VGA is ok to probe, MSI are not supported */ + fadt->iapc_boot_arch = 0xb; /* fixme */ - fadt->flags = 0x4a5; + fadt->flags = 0xa5;
fadt->reset_reg.space_id = 0; fadt->reset_reg.bit_width = 0;