Author: rminnich Date: 2008-12-06 04:59:24 +0100 (Sat, 06 Dec 2008) New Revision: 1065
Modified: coreboot-v3/arch/x86/Kconfig coreboot-v3/arch/x86/Makefile coreboot-v3/mainboard/kontron/986lcd-m/Makefile coreboot-v3/mainboard/kontron/986lcd-m/mainboard.h coreboot-v3/mainboard/kontron/Kconfig Log: Add support for creating an smm top-level object.
Whether SMM is added or not depends on the mainboard. To enable SMM, the Kconfig variable SMM should be set, and the SMM variable should be defined in the mainbard.
Also correct a type CONFIG_HPET should be HPET.
Signed-off-by: Ronald G. Minnich rminnich@gmail.com
Acked-by: Stefan Reinauer stepan@coresystems.de Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Modified: coreboot-v3/arch/x86/Kconfig =================================================================== --- coreboot-v3/arch/x86/Kconfig 2008-12-03 23:39:49 UTC (rev 1064) +++ coreboot-v3/arch/x86/Kconfig 2008-12-06 03:59:24 UTC (rev 1065) @@ -72,13 +72,21 @@ arch/x86/Makefile for more hints on possible values. It is usually set in mainboard/*/Kconfig.
-config CONFIG_HPET +config HPET boolean depends CPU_AMD_K8 help Whether to configure a High Precision Event Timer (HPET). Note that HPETs are known to be bug-prone.
+config SMM + boolean + help + Whether to configure System Management Mode support. + This is mainboard-enabled. This is a tricky option that + should not be enabled/disabled casually, as some chipsets + will not work without some form of SMM enabled. + config K8_REV_F_SUPPORT hex default 0 if CPU_AMD_K8
Modified: coreboot-v3/arch/x86/Makefile =================================================================== --- coreboot-v3/arch/x86/Makefile 2008-12-03 23:39:49 UTC (rev 1064) +++ coreboot-v3/arch/x86/Makefile 2008-12-06 03:59:24 UTC (rev 1065) @@ -48,7 +48,7 @@ COMPRESSFLAG := -C nrv2b endif
-$(obj)/coreboot.rom $(obj)/coreboot.map: $(obj)/coreboot.bootblock $(obj)/util/lar/lar lzma nrv2b $(obj)/coreboot.initram $(obj)/coreboot.stage2 $(obj)/option_table +$(obj)/coreboot.rom $(obj)/coreboot.map: $(obj)/coreboot.bootblock $(obj)/util/lar/lar lzma nrv2b $(obj)/coreboot.initram $(obj)/coreboot.stage2 $(obj)/option_table $(SMM) $(Q)printf " LAR $(subst $(shell pwd)/,,$(@))\n" $(Q)rm -f $(obj)/coreboot.rom $(Q)cd $(obj) && \ @@ -74,6 +74,10 @@ $(Q)printf " ZEROING lar -z ./coreboot.rom\n" $(Q)cd $(obj) && ./util/lar/lar -z ./coreboot.rom endif +ifeq ($(CONFIG_SMM),y) + $(Q)printf " Adding smm.elf\n" + $(Q)cd $(obj) && ./util/lar/lar -e $(COMPRESSFLAG) -a $(obj)/coreboot.rom $(SMM):normal/smm; +endif $(Q)# QEMU wants bios.bin: $(Q)# Run "qemu -L build/ -serial stdio -hda /dev/zero". $(Q)printf " CP $(subst $(shell pwd)/,,$(obj)/bios.bin)\n"
Modified: coreboot-v3/mainboard/kontron/986lcd-m/Makefile =================================================================== --- coreboot-v3/mainboard/kontron/986lcd-m/Makefile 2008-12-03 23:39:49 UTC (rev 1064) +++ coreboot-v3/mainboard/kontron/986lcd-m/Makefile 2008-12-06 03:59:24 UTC (rev 1065) @@ -35,3 +35,4 @@ $(Q)printf " BUILD DUMMY VPD\n" $(Q)dd if=/dev/zero of=$(obj)/coreboot.vpd bs=256 count=1 $(SILENT)
+SMM := $(obj)/southbridge/intel/i82801gx/smm.elf
Modified: coreboot-v3/mainboard/kontron/986lcd-m/mainboard.h =================================================================== --- coreboot-v3/mainboard/kontron/986lcd-m/mainboard.h 2008-12-03 23:39:49 UTC (rev 1064) +++ coreboot-v3/mainboard/kontron/986lcd-m/mainboard.h 2008-12-06 03:59:24 UTC (rev 1065) @@ -31,3 +31,5 @@ /* nowhere else to go yet */ #define TEST_SMM_FLASH_LOCKDOWN 0
+#define TTYS0_BASE 0x3f8 +
Modified: coreboot-v3/mainboard/kontron/Kconfig =================================================================== --- coreboot-v3/mainboard/kontron/Kconfig 2008-12-03 23:39:49 UTC (rev 1064) +++ coreboot-v3/mainboard/kontron/Kconfig 2008-12-06 03:59:24 UTC (rev 1065) @@ -32,6 +32,7 @@ select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_WINBOND_W83627THG select PIRQ_TABLE + select SMM help Kontron 986LCD-M Series mainboards