On 30/09/2009, Uwe Hermann uwe@hermann-uwe.de wrote:
On Sun, Sep 27, 2009 at 12:01:12AM +0200, Maciej Pijanka wrote:
This is last version, includes detecting southbridge using device_class not device location on bus as Stefan suggested, also will tell if find more than one device with device_class 0x601 and notify which one it used (it will be first but may depend on order of devices inside structures returned by libpci).
Thanks, committed as r4694 with some smaller changes. May need some more work though.
Here's the output from one of my 440BX boards, which looks a bit strange:
Intel CPU: Family 6, Model 8 Intel Northbridge: 8086:7190 (82443BX) Intel Southbridge: 8086:7110 (82371AB/EB/MB)
[..]
============= PMBASE ============
PMBASE = 0x0000 (IO)
pmbase+0x0000: 0xffff (PMSTS) pmbase+0x0002: 0x7f7f (PMEN) pmbase+0x0004: 0xffff (PMCNTRL) pmbase+0x0006: 0xffff (RESERVED) pmbase+0x0008: 0x00 (PMTMR) pmbase+0x0009: 0xff (RESERVED) pmbase+0x000a: 0xff (RESERVED) pmbase+0x000b: 0xff (RESERVED) pmbase+0x000c: 0xffff (GPSTS) pmbase+0x000e: 0xffff (GPEN) pmbase+0x0010: 0xffffffff (PCNTRL) pmbase+0x0018: 0x0000 (GLBSTS) pmbase+0x001a: 0xffff (RESERVED) pmbase+0x001c: 0xffffffff (DEVSTS) pmbase+0x0020: 0x0000 (GLBEN) pmbase+0x0022: 0xff (RESERVED) pmbase+0x0023: 0xff (RESERVED) pmbase+0x0024: 0x00 (RESERVED) pmbase+0x0025: 0x20 (RESERVED) pmbase+0x0026: 0xff (RESERVED) pmbase+0x0027: 0xff (RESERVED) pmbase+0x0028: 0x00000000 (GLBCTL) pmbase+0x002c: 0x00000000 (DEVCTL) pmbase+0x0030: 0x00 (GPIREG 0) pmbase+0x0031: 0x20 (GPIREG 1) pmbase+0x0032: 0xff (GPIREG 2) pmbase+0x0033: 0xff (GPIREG 3) pmbase+0x0034: 0x00 (GPOREG 0) pmbase+0x0035: 0x20 (GPOREG 1) pmbase+0x0036: 0xff (GPOREG 2) pmbase+0x0037: 0xff (GPOREG 3)
[..]
I think 440BX doesn't have most of the BARs mentioned above either (which we can easily fix). The more interesting question is why the PMBASE is 0x00000 above.
I had no idea if i should put warnings about those BARs and datasheet didn't mention anything like that but maybe i overlooked something.
Here's the respective lspci:
00:04.0 ISA bridge [0601]: Intel Corporation 82371AB/EB/MB PIIX4 ISA [8086:7110] (rev 02) Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: 86 80 10 71 0f 00 80 02 02 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 09 00 20 00
[...]
So 0x40 (PMBASE) is indeed simply 0x0000, no idea if that's supposed to be the case.
On all my machines that have 440BX or 440LX and are operational that i can run inteltool there i have same 0x0000 PM base regardless i have enabled power management in bios or not. And indeed i think it is odd. One idea that came to my mind was writing very short and dumb module that will claim some IO space and set pmbase register to point to that space and check again, but didn't found yet time to put pieces together.
Maciej