Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1002
-gerrit
commit ceb11f76b4099fdde0210ed6eb1967dffc79ff73 Author: Stefan Reinauer reinauer@chromium.org Date: Thu May 3 16:40:41 2012 -0700
Hook up MRC cache update
This one is a WIP:
- should not depend on CONFIG_CHROMEOS
- There might be a better place for it. Requirements: - must be in ramstage (locking flash while executing code from there might not work) - must be after cbmem is reinitialized (so the mrc cache copy of the current run can be found)
Change-Id: I8028fb073349ce2b027ef5f8397dc1a1b8b31c02 Signed-off-by: Patrick Georgi patrick@georgi-clan.de --- src/arch/x86/boot/tables.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c index 4fefc7d..ff57422 100644 --- a/src/arch/x86/boot/tables.c +++ b/src/arch/x86/boot/tables.c @@ -53,6 +53,11 @@ struct lb_memory *write_tables(void) */ unsigned long high_table_pointer;
+#if CONFIG_CHROMEOS + void update_mrc_cache(void); + update_mrc_cache(); +#endif + if (!high_tables_base) { printk(BIOS_ERR, "ERROR: High Tables Base is not set.\n"); // Are there any boards without?