thank you for your posting, Darmawan.
do you think that PCI expansion ROM may be useful during the developing phase in order to avoid soldering as on an GA M57sli mobo ? Eventually it does not make much sense anymore, when the LinuxBIOS code is verified to work. But before that it allows quick fallback, one might think. --Q
Darmawan Salihun schrieb:
Hi guys, Is there any implementation of Cache as RAM in the current LinuxBIOS code (it's version 2 at the moment, right?) for processor other than K8 (Opteron/Athlon64 family)? I've just grepped through the code and can spot supports for K8 platforms.