Peter? This is a side effect of r3291, the "multiple flash chip" patch. All of our SPI chips where a generic per-vendor fallback detection exists (that's all of them right now) will exhibit this problem.
On 11.05.2008 18:01, Fredrik Tolf wrote:
On Sun, 2008-05-11 at 15:32 +0200, Carl-Daniel Hailfinger wrote:
Can you test the patch below? It should have a lower error probability and work fine for you. If you are OK with my changes to your patch, please re-add your Signed-off-by line.
Yes, the flashrom code with that patch seems to detect my chip and read its contents quite well. However, the same code does not detect the original chip on the board (an MX25L4005) satisfactory, and it seems to be a conflict with the SPI code. Here's the output:
Calibrating delay loop... OK. No coreboot table found. Found chipset "NVIDIA MCP55", enabling flash write... OK. Found board "GIGABYTE GA-M57SLI-S4": enabling flash write... Serial flash segment 0xfffe0000-0xffffffff enabled Serial flash segment 0x000e0000-0x000fffff enabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff enabled LPC write to serial flash enabled serial flash pin 29 OK. MX25L4005 found at physical address 0xfff80000. unknown SPI chip found at physical address 0x0. Multiple flash chips were detected: MX25L4005 unknown SPI chip Please specify which chip to use with the -c <chipname> option.
Fredrik, you should be able to work around this by calling flashrom -c MX25L4005 The patch I sent does not have anything to do with the MX25L4005 problem you're seeing because that problem was introduced in r3291. Can you signoff this patch since it works for you?
Regards, Carl-Daniel