Author: uwe Date: Sat Oct 9 19:00:18 2010 New Revision: 5929 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5929
Log: Remove various .c #includes from Intel 440BX/82371EB boards.
- Use 'romstage-y' to turn i82371eb_early_pm.c and i82371eb_early_smbus.c into distinct compilation units, and don't #include the files anymore in romstage.c files.
- Ditto for lib/debug.c, northbridge/intel/i440bx/raminit.c, and northbridge/intel/i440bx/debug.c.
- Add various header files which are now needed.
- Make functions that need to be visible non-static.
- Drop a remaining "select ROMCC" from a 4440BX board.
Signed-off-by: Uwe Hermann uwe@hermann-uwe.de Acked-by: Idwer Vollering vidwer@gmail.com
Modified: trunk/src/mainboard/a-trend/atc-6220/romstage.c trunk/src/mainboard/a-trend/atc-6240/romstage.c trunk/src/mainboard/abit/be6-ii_v2_0/romstage.c trunk/src/mainboard/asus/p2b-d/romstage.c trunk/src/mainboard/asus/p2b-ds/romstage.c trunk/src/mainboard/asus/p2b-f/romstage.c trunk/src/mainboard/asus/p2b-ls/romstage.c trunk/src/mainboard/asus/p2b/romstage.c trunk/src/mainboard/asus/p3b-f/romstage.c trunk/src/mainboard/azza/pt-6ibd/romstage.c trunk/src/mainboard/biostar/m6tba/romstage.c trunk/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c trunk/src/mainboard/gigabyte/ga-6bxc/romstage.c trunk/src/mainboard/gigabyte/ga-6bxe/romstage.c trunk/src/mainboard/msi/ms6119/romstage.c trunk/src/mainboard/msi/ms6147/romstage.c trunk/src/mainboard/msi/ms6156/romstage.c trunk/src/mainboard/nokia/ip530/Kconfig trunk/src/mainboard/nokia/ip530/romstage.c trunk/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c trunk/src/mainboard/tyan/s1846/romstage.c trunk/src/northbridge/intel/i440bx/Makefile.inc trunk/src/northbridge/intel/i440bx/debug.c trunk/src/northbridge/intel/i440bx/raminit.c trunk/src/northbridge/intel/i440bx/raminit.h trunk/src/southbridge/intel/i82371eb/Makefile.inc trunk/src/southbridge/intel/i82371eb/i82371eb.h trunk/src/southbridge/intel/i82371eb/i82371eb_early_pm.c trunk/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c trunk/src/southbridge/intel/i82371eb/i82371eb_smbus.c trunk/src/southbridge/intel/i82371eb/i82371eb_smbus.h
Modified: trunk/src/mainboard/a-trend/atc-6220/romstage.c ============================================================================== --- trunk/src/mainboard/a-trend/atc-6220/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/a-trend/atc-6220/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -37,14 +36,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Modified: trunk/src/mainboard/a-trend/atc-6240/romstage.c ============================================================================== --- trunk/src/mainboard/a-trend/atc-6240/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/a-trend/atc-6240/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -37,14 +36,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83627HF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Modified: trunk/src/mainboard/abit/be6-ii_v2_0/romstage.c ============================================================================== --- trunk/src/mainboard/abit/be6-ii_v2_0/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/abit/be6-ii_v2_0/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -39,14 +38,14 @@ /* FIXME: It's a Winbond W83977EF, actually. */ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { /* FIXME: It's a Winbond W83977EF, actually. */
Modified: trunk/src/mainboard/asus/p2b-d/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p2b-d/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/asus/p2b-d/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -27,7 +27,7 @@ #include <stdlib.h> #include <cpu/x86/lapic.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" #include "lib/debug.c" #include "pc80/udelay_io.c" @@ -38,14 +38,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { enable_lapic(); /* FIXME? */
Modified: trunk/src/mainboard/asus/p2b-ds/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p2b-ds/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/asus/p2b-ds/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -27,9 +27,8 @@ #include <stdlib.h> #include <cpu/x86/lapic.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -38,14 +37,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { enable_lapic(); /* FIXME? */
Modified: trunk/src/mainboard/asus/p2b-f/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p2b-f/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/asus/p2b-f/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -39,14 +38,14 @@ /* FIXME: The ASUS P2B-F has a Winbond W83977EF, actually. */ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { /* FIXME: The ASUS P2B-F has a Winbond W83977EF, actually. */
Modified: trunk/src/mainboard/asus/p2b-ls/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p2b-ls/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/asus/p2b-ls/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" #include "lib/debug.c" #include "pc80/udelay_io.c" @@ -38,14 +38,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { /* FIXME: The ASUS P2B-LS has a Winbond W83977EF, actually. */
Modified: trunk/src/mainboard/asus/p2b/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p2b/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/asus/p2b/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -37,14 +36,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Modified: trunk/src/mainboard/asus/p3b-f/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p3b-f/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/asus/p3b-f/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,10 +26,8 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" -#include "southbridge/intel/i82371eb/i82371eb_early_pm.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -37,17 +35,18 @@ #include "superio/winbond/w83977tf/w83977tf_early_serial.c" #include <lib.h>
+void enable_pm(void); +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + /* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - /* * ASUS P3B-F specific SPD enable magic. *
Modified: trunk/src/mainboard/azza/pt-6ibd/romstage.c ============================================================================== --- trunk/src/mainboard/azza/pt-6ibd/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/azza/pt-6ibd/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -39,14 +38,14 @@ /* FIXME: It's a Winbond W83977EF, actually. */ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { /* FIXME: It's a Winbond W83977EF, actually. */
Modified: trunk/src/mainboard/biostar/m6tba/romstage.c ============================================================================== --- trunk/src/mainboard/biostar/m6tba/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/biostar/m6tba/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -37,14 +36,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Modified: trunk/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c ============================================================================== --- trunk/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -39,14 +38,14 @@ /* FIXME: This should be PC97307 (but it's buggy at the moment)! */ #define SERIAL_DEV PNP_DEV(0x15c, PC97317_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { /* FIXME: Should be PC97307! */
Modified: trunk/src/mainboard/gigabyte/ga-6bxc/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ga-6bxc/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/gigabyte/ga-6bxc/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -38,14 +37,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Modified: trunk/src/mainboard/gigabyte/ga-6bxe/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ga-6bxe/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/gigabyte/ga-6bxe/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" #include "lib/debug.c" #include "pc80/udelay_io.c" @@ -38,14 +38,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { it8671f_48mhz_clkin();
Modified: trunk/src/mainboard/msi/ms6119/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms6119/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/msi/ms6119/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -37,14 +36,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Modified: trunk/src/mainboard/msi/ms6147/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms6147/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/msi/ms6147/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include <cpu/x86/bist.h> @@ -37,14 +36,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Modified: trunk/src/mainboard/msi/ms6156/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms6156/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/msi/ms6156/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -37,14 +36,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Modified: trunk/src/mainboard/nokia/ip530/Kconfig ============================================================================== --- trunk/src/mainboard/nokia/ip530/Kconfig Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/nokia/ip530/Kconfig Sat Oct 9 19:00:18 2010 (r5929) @@ -28,7 +28,6 @@ select SOUTHBRIDGE_TI_PCI1X2X select DRIVERS_DEC_21143 select BOARD_ROMSIZE_KB_256 - select ROMCC select PIRQ_ROUTE select HAVE_PIRQ_TABLE select UDELAY_TSC
Modified: trunk/src/mainboard/nokia/ip530/romstage.c ============================================================================== --- trunk/src/mainboard/nokia/ip530/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/nokia/ip530/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -37,14 +36,14 @@
#define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Modified: trunk/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c ============================================================================== --- trunk/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -38,14 +37,14 @@
#define SERIAL_DEV PNP_DEV(0x370, IT8671F_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Modified: trunk/src/mainboard/tyan/s1846/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s1846/romstage.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/mainboard/tyan/s1846/romstage.c Sat Oct 9 19:00:18 2010 (r5929) @@ -26,9 +26,8 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" @@ -37,14 +36,14 @@
#define SERIAL_DEV PNP_DEV(0x2e, PC87309_SP1)
-static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); }
-#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - void main(unsigned long bist) { pc87309_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Modified: trunk/src/northbridge/intel/i440bx/Makefile.inc ============================================================================== --- trunk/src/northbridge/intel/i440bx/Makefile.inc Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/northbridge/intel/i440bx/Makefile.inc Sat Oct 9 19:00:18 2010 (r5929) @@ -20,3 +20,6 @@
driver-y += northbridge.c
+romstage-y += raminit.c +romstage-y += debug.c +
Modified: trunk/src/northbridge/intel/i440bx/debug.c ============================================================================== --- trunk/src/northbridge/intel/i440bx/debug.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/northbridge/intel/i440bx/debug.c Sat Oct 9 19:00:18 2010 (r5929) @@ -1,4 +1,6 @@ -static void dump_spd_registers(void) +#include "raminit.h" + +void dump_spd_registers(void) { #if CONFIG_DEBUG_RAM_SETUP int i;
Modified: trunk/src/northbridge/intel/i440bx/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i440bx/raminit.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/northbridge/intel/i440bx/raminit.c Sat Oct 9 19:00:18 2010 (r5929) @@ -21,7 +21,12 @@
#include <spd.h> #include <delay.h> +#include <stdint.h> #include <stdlib.h> +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <device/pci_def.h> +#include <console/console.h> #include "i440bx.h" #include "raminit.h"
@@ -630,7 +635,7 @@ Public interface. -----------------------------------------------------------------------------*/
-static void sdram_set_registers(void) +void sdram_set_registers(void) { int i, max; uint8_t reg; @@ -956,7 +961,7 @@ PRINT_DEBUG("\n"); }
-static void sdram_set_spd_registers(void) +void sdram_set_spd_registers(void) { /* Setup DRAM row boundary registers and other attributes. */ set_dram_row_attributes(); @@ -972,7 +977,7 @@ pci_write_config8(NB, DRAMT, 0x03); }
-static void sdram_enable(void) +void sdram_enable(void) { int i;
Modified: trunk/src/northbridge/intel/i440bx/raminit.h ============================================================================== --- trunk/src/northbridge/intel/i440bx/raminit.h Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/northbridge/intel/i440bx/raminit.h Sat Oct 9 19:00:18 2010 (r5929) @@ -26,5 +26,12 @@
/* DIMMs 1-4 are at 0x50, 0x51, 0x52, 0x53. */ #define DIMM_SPD_BASE 0x50 + +/* Function prototypes. */ +int spd_read_byte(unsigned int device, unsigned int address); +void sdram_set_registers(void); +void sdram_set_spd_registers(void); +void sdram_enable(void); +void dump_spd_registers(void);
#endif /* RAMINIT_H */
Modified: trunk/src/southbridge/intel/i82371eb/Makefile.inc ============================================================================== --- trunk/src/southbridge/intel/i82371eb/Makefile.inc Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/southbridge/intel/i82371eb/Makefile.inc Sat Oct 9 19:00:18 2010 (r5929) @@ -25,4 +25,6 @@ driver-y += i82371eb_smbus.c driver-y += i82371eb_reset.c
-#romstage-y += i82371eb_early_rom.c +romstage-y += i82371eb_early_pm.c +romstage-y += i82371eb_early_smbus.c +
Modified: trunk/src/southbridge/intel/i82371eb/i82371eb.h ============================================================================== --- trunk/src/southbridge/intel/i82371eb/i82371eb.h Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/southbridge/intel/i82371eb/i82371eb.h Sat Oct 9 19:00:18 2010 (r5929) @@ -21,10 +21,17 @@ #ifndef SOUTHBRIDGE_INTEL_I82371EB_I82371EB_H #define SOUTHBRIDGE_INTEL_I82371EB_I82371EB_H
+#if !defined(ASSEMBLY) #if !defined(__PRE_RAM__) + +#include <arch/io.h> +#include <device/device.h> #include "chip.h" + void i82371eb_enable(device_t dev); void i82371eb_hard_reset(void); + +#endif #endif
/* If 'cond' is true this macro sets the bit(s) specified by 'bits' in the @@ -55,6 +62,8 @@ #define PMBA 0x40 /* Power management base address */ #define PMREGMISC 0x80 /* Miscellaneous power management */
+#define PM_IO_BASE 0xe400 + /* Bit definitions */ #define EXT_BIOS_ENABLE_1MB (1 << 9) /* 1-Meg Extended BIOS Enable */ #define EXT_BIOS_ENABLE (1 << 7) /* Extended BIOS Enable */
Modified: trunk/src/southbridge/intel/i82371eb/i82371eb_early_pm.c ============================================================================== --- trunk/src/southbridge/intel/i82371eb/i82371eb_early_pm.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/southbridge/intel/i82371eb/i82371eb_early_pm.c Sat Oct 9 19:00:18 2010 (r5929) @@ -19,24 +19,25 @@ */
#include <stdint.h> +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <device/pci_def.h> #include <device/pci_ids.h> +#include <console/console.h> #include "i82371eb.h"
-#define PM_IO_BASE 0xe400 +void enable_pm(void);
-static void enable_pm(void) +void enable_pm(void) { device_t dev; u8 reg8; u16 reg16;
- /* Check for SMBus/PM device PCI ID on the 82371AB/EB/MB. */ + /* Get the SMBus/PM device of the 82371AB/EB/MB. */ dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_SMB_ACPI), 0);
- if (dev == PCI_DEV_INVALID) - die("SMBus/PM controller not found\n"); - /* Set the PM I/O base. */ pci_write_config32(dev, PMBA, PM_IO_BASE | 1);
@@ -50,4 +51,3 @@ reg8 |= PMIOSE; pci_write_config8(dev, PMREGMISC, reg8); } -
Modified: trunk/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c ============================================================================== --- trunk/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c Sat Oct 9 19:00:18 2010 (r5929) @@ -18,28 +18,29 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-/* TODO: Implement smbus_write_byte(), smbus_recv_byte(), smbus_send_byte(). */ - #include <stdint.h> +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <console/console.h> #include <device/pci_ids.h> +#include <device/pci_def.h> #include "i82371eb.h" #include "i82371eb_smbus.h"
#define SMBUS_IO_BASE 0x0f00
-static void enable_smbus(void) +int smbus_read_byte(u8 device, u8 address); + +void enable_smbus(void) { device_t dev; u8 reg8; u16 reg16;
- /* Check for SMBus/PM device PCI ID on the 82371AB/EB/MB. */ + /* Get the SMBus/PM device of the 82371AB/EB/MB. */ dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_SMB_ACPI), 0);
- if (dev == PCI_DEV_INVALID) - die("SMBus/PM controller not found\n"); - /* Set the SMBus I/O base. */ pci_write_config32(dev, SMBBA, SMBUS_IO_BASE | 1);
@@ -57,7 +58,7 @@ outb(inb(SMBUS_IO_BASE + SMBHST_STATUS), SMBUS_IO_BASE + SMBHST_STATUS); }
-static int smbus_read_byte(u8 device, u8 address) +int smbus_read_byte(u8 device, u8 address) { return do_smbus_read_byte(SMBUS_IO_BASE, device, address); }
Modified: trunk/src/southbridge/intel/i82371eb/i82371eb_smbus.c ============================================================================== --- trunk/src/southbridge/intel/i82371eb/i82371eb_smbus.c Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/southbridge/intel/i82371eb/i82371eb_smbus.c Sat Oct 9 19:00:18 2010 (r5929) @@ -24,6 +24,7 @@ #include <device/pci_ids.h> #include <device/smbus.h> #include "i82371eb.h" +#include "i82371eb_smbus.h"
/* TODO: Needed later? */ static const struct smbus_bus_operations lops_smbus_bus = {
Modified: trunk/src/southbridge/intel/i82371eb/i82371eb_smbus.h ============================================================================== --- trunk/src/southbridge/intel/i82371eb/i82371eb_smbus.h Sat Oct 9 09:18:50 2010 (r5928) +++ trunk/src/southbridge/intel/i82371eb/i82371eb_smbus.h Sat Oct 9 19:00:18 2010 (r5929) @@ -10,6 +10,9 @@ #define SMBUS_STATUS_MASK 0x1e #define SMBUS_ERROR_FLAG (1<<2)
+void enable_smbus(void); +int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address); + static inline void smbus_delay(void) { outb(0x80, 0x80); @@ -63,7 +66,7 @@ return loops?0:SMBUS_WAIT_UNTIL_DONE_TIMEOUT; }
-static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address) +int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address) { unsigned status_register; unsigned byte;