Dear Nico,
Am 28.06.20 um 13:21 schrieb Nico Huber:
On 28.06.20 11:35, Paul Menzel wrote:
The only remarkable difference in the logs is:
-PCI: 06:00.0 bridge ctrl <- 016b
this seems very suspicious. Bit 3 enables VGA decoding. It shouldn't matter because it's behind another bridge that hasn't the bit set, but still, WTF? I have no idea how this could end up being set (unless hardware is borked and the device wasn't reset properly). Was this on a cold boot? If yes, something in coreboot went wrong.
I am pretty sure it is, but probably with battery and power cable still connected. When it hung in SeaBIOS, I had to press the power button for around ten seconds, and then I started the system by pressing the power button again. It could also have been after the `LP S4# Assertion Width Violation` though [1].
LP S4# Assertion Width Violation. Reset required. full_reset() called!
Kind regards,
Paul
[1]: https://mail.coreboot.org/pipermail/coreboot/2017-January/083059.html