[coreboot] New patch to review for coreboot: 7af263d ASRock E350M1: Remove unused variable `reg8` from `romstage.c`

[Paul Menzel]

Paul Menzel ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2230

-gerrit

commit 7af263dc0d5c9fafab49fce26efa8095eee1f694
Author: Paul Menzel 
Date:   Wed Jan 30 14:01:42 2013 +0100

ASRock E350M1: Remove unused variable `reg8` from `romstage.c`

[…]
            CC         romstage.inc
        src/mainboard/asrock/e350m1/romstage.c: In function 'cache_as_ram_main':
        src/mainboard/asrock/e350m1/romstage.c:48:5: warning: unused variable 'reg8' [-Wunused-variable]

This change was already done for AMD Persimmon in the following
    commit.

commit d7a696d0f229abccc95ff411f28d91b9b796ab74
        Author: efdesign98 
        Date:   Thu Sep 15 15:24:26 2011 -0600

Persimmon updates for AMD F14 rev C0

Change-Id: I8f1ae1a609b87b197583934f0556f66b64e6994d
    Signed-off-by: Paul Menzel 
---
 src/mainboard/asrock/e350m1/romstage.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c
index a8aeabd..d33c2bc 100644
--- a/src/mainboard/asrock/e350m1/romstage.c
+++ b/src/mainboard/asrock/e350m1/romstage.c
@@ -45,7 +45,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
    u32 val;
-	u8 reg8;

/*
     * All cores: allow caching of flash chip code and data