Am Dienstag 02 Oktober 2007 schrieb Corey Osgood:
Markus wrote:
In the config file I change the ROM_Size, but I don't know the right value for the ROM_IMAGE_SIZE. The 0x10000 build but it was the right value for the 256 KB flash. A doubel to 0x20000 would not build.
Markus
ROM_IMAGE_SIZE is decieving, it's the amount of space to allow LinuxBIOS (not including the payload) to occupy, for each image (normal/fallback). It's safe to leave it as 0x10000, or increment as necessary if LB needs more room, but LB doesn't like to have TOO much room. Whatever space is left over can be used for a payload or left empty.
-Corey
So today I'm able to load etherboot:
------ Calibrating delay loop... ok No LinuxBIOS table found. Found chipset "CS5530/CS5530A": Enabling flash write... OK. Am29F040B found at physical address: 0xfff80000 Flash part is Am29F040B (512 KB) Note: If the following flash access fails, you might need to specify -m <vendor>:<mainboard> Programming page 0007 at address: 0x0007ffff Geode:~# 0.0.0Normal Di 16. Okt 19:23:27 CEST 2007 starting... Setting up default parameters for memory Sizing memory Probing for DIMM0 Found DIMM0 Page Size: 00002000 Component Banks: 4 Module Banks: 1 DIMM size: 08000000 Probing for DIMM1 MC_BANK_CFG = 00701530 Copying LinuxBIOS to RAM. Jumping to LinuxBIOS. LinuxBIOS-2.0.0.0Normal Di 16. Okt 19:23:27 CEST 2007 booting... clocks_per_usec: 360 Enumerating buses... Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [1078/0001] enabled PCI: 00:0f.0 [10ec/8139] enabled PCI: 00:12.0 [1078/0100] enabled PCI: 00:12.1 [1078/0101] enabled PCI: 00:12.2 [1078/0102] enabled PCI: 00:12.3 [1078/0103] enabled PCI: 00:12.4 [1078/0104] enabled PCI: 00:13.0 [0e11/a0f8] enabled PNP: 002e.0 enabled PNP: 002e.1 enabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.4 enabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 enabled PNP: 002e.8 enabled PCI: 00:12.1 disabled PCI: 00:12.2 enabled PCI: 00:12.3 disabled PCI: 00:12.4 disabled PCI: pci_scan_bus returning with max=000 done Allocating resources... Reading resources... Done reading resources. Setting resources... BC_DRAM_TOP = 0x07ffffff MC_GBASE_ADD = 0x00000100 I would set ram size to 128 Mbytes PCI: 00:0f.0 10 <- [0x0000001000 - 0x00000010ff] io PCI: 00:0f.0 14 <- [0x00febfd000 - 0x00febfd0ff] mem PCI: 00:12.1 10 <- [0x00febfe000 - 0x00febfe0ff] mem PCI: 00:12.2 20 <- [0x0000001400 - 0x000000147f] io PCI: 00:12.3 10 <- [0x00febff000 - 0x00febff07f] mem PCI: 00:12.4 10 <- [0x00febfb000 - 0x00febfbfff] mem PCI: 00:13.0 10 <- [0x00febfc000 - 0x00febfcfff] mem Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 07 PCI: 00:0f.0 cmd <- 03 PCI: 00:12.0 cmd <- 0f PCI: 00:12.2 missing enable_resources PCI: 00:12.1 cmd <- 02 PCI: 00:12.2 cmd <- 01 PCI: 00:12.3 cmd <- 02 PCI: 00:12.4 cmd <- 02 PCI: 00:13.0 cmd <- 02 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:12.0 init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.4 init PNP: 002e.5 init PNP: 002e.6 init PNP: 002e.7 init PNP: 002e.8 init PCI: 00:0f.0 init PCI: 00:12.1 init PCI: 00:12.2 init Primary IDE interface disabled Secondary IDE interface enabled PCI: 00:12.3 init PCI: 00:12.4 init PCI: 00:13.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 done. Moving GDT to 0x500...ok Adjust low_table_end from 0x00000530 to 0x00001000 Adjust rom_table_end from 0x000f0400 to 0x00100000 Wrote linuxbios table at: 00000530 - 0000068c checksum 71bc
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3
rom_stream: 0xfffc0000 - 0xfffcffff Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 Loading Etherboot version: 5.4.3 Dropping non PT_LOAD segment New segment addr 0x10000 size 0xb3c0 offset 0x0 filesize 0x6880 (cleaned up) New segment addr 0x10000 size 0xb3c0 offset 0x0 filesize 0x6880 Loading Segment: addr: 0x0000000007fe4000 memsz: 0x0000000000008000 filesz: 0x0000000000006880 Clearing Segment: addr: 0x0000000007fea880 memsz: 0x0000000000001780 Loading Segment: addr: 0x0000000000018000 memsz: 0x00000000000033c0 filesz: 0x0000000000000000 Clearing Segment: addr: 0x0000000000018000 memsz: 0x00000000000033c0 CPU 237 Mhzboot code at 0x100b0 Etherboot 5.4.3 (GPL) http://etherboot.org Drivers: r8169/PCI Images: ELF Protocols: DHCP TFTP Relocating _text from: [000100e0,0001b3c0) to [07ef4d20,07f00000) Boot from (N)etwork or (Q)uit?
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I don't know why, but is in the config file a phrase there the loadarea for the elfloader ist specified? Because if i let the orginal 256 Kb rom size and doubel it after with cat linuxbios.rom linuxbios.rom > bios512.rom then it will boot. The change of the 256 to 512 in the config file at ./targets/eaglelion/5bcm/Config is not working.
Greeding Markus Boas