I have needed to sync my code base with the main tree for a while, and I finally find a little bit of time. While what I have is not quite perfect it is the best I can do and should not be too hard to keep up with. I will try to keep things in smaller steps next round. freebios2 is stabilizing so it getting harder to implement a big disruptive change :)
The radical changes are how the K8 early setup and memory initialization is accomplished. The whole processes normally only needs a single reset at the very begging of the boot now. I suspect I have broken several Opteron platforms with the changes needed to support this. The hdama and solo ports should still work.
The other radical change is I have finally written some generic super code in place and I removed the place holder structures com_ports and lpt_ports from chip.h. I think this only affects ports using the winbond w83627thf chip. It looked like an exact clone of the pc87360 code and I don't believe the two chips are identical. The pc87360/superio.c is not fully functional at only 78 lines of code so it should be simple enough to fix.
The other big user visible change is that it is now possible to specify static resource assignments in Config.lb generically. A snippet of the hdama/Config.lb is:
superio NSC/pc87360 link 1 pnp 2e.0 off # Floppy io 0x60 = 0x3f0 irq 0x70 = 6 drq 0x74 = 2 pnp 2e.1 off # Parallel Port io 0x60 = 0x378 irq 0x70 = 7 pnp 2e.2 off # Com 2 io 0x60 = 0x2f8 irq 0x70 = 3 pnp 2e.3 on # Com 1 io 0x60 = 0x3f8 irq 0x70 = 4 pnp 2e.4 off # SWC pnp 2e.5 off # Mouse pnp 2e.6 on # Keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 pnp 2e.7 off # GPIO pnp 2e.8 off # ACB pnp 2e.9 off # FSCM pnp 2e.a off # WDT
My full commit comments are below.
Holler and I will help fix the breakage I have caused.
- Moved hlt() to it's own header. - Reworked pnp superio device support. Now complete superio support is less than 100 lines. - Added support for hard coding resource assignments in Config.lb - Minor bug fixes to romcc - Initial support for catching the x86 processor BIST error codes. I've only seen this trigger once in production during a very suspcious reset but... - added raminit_test to test the code paths in raminit.c for the Opteron - Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED so we can tell what we have really done. - Added generic AGP/IOMMU setting code to x86 - Added an implementation of memmove and removed reserved identifiers from memcpy - Added minimal support for booting on pre b3 stepping K8 cores - Moved the checksum on amd8111 boards because our default location was on top of extended RTC registers - On the Hdama added support for enabling i2c hub so we can get at the temperature sensors. Not that i2c bus was implemented well enough to make that useful. - Redid the Opteron port so we should only need one reset and most of memory initialization is done in cpu_fixup. This is much, much faster. - Attempted to make the VGA IO region assigment work. The code seems to work now... - Redid the error handling in amdk8/raminit.c to distinguish between a bad value and a smbus error, and moved memory clearing out to cpufixup. - Removed CONFIG_KEYBOARD as it was useless. See pc87360/superio.c for how to setup a legacy keyboard properly. - Reworked the register values for standard hardware, moving the defintions from chip.h into the headers of the initialization routines. This is much saner and is actually implemented. - Made the hdama port an under clockers BIOS. I debuged so many interesting problems. - On amd8111_lpc added setup of architectural/legacy hardware - Enabled PCI error reporting as much as possible. - Enhanded build_opt_tbl to generate a header of the cmos option locations so that romcc compiled code can query the cmos options. - In romcc gracefully handle function names that degenerate into function pointers - Bumped the version to 1.1.6 as we are getting closer to 2.0
TODO finish optimizing the HT links of non dual boards TODO make all Opteron board work again TODO convert all superio devices to use the new helpers TODO convert the via/epia to freebios2 conventions TODO cpu fixup/setup by cpu type TODO update romcc so I can pass in values from assembly code TODO irq routing in the device tree.
Eric
Modified Files: src/arch/i386/include/arch/romcc_io.h src/arch/i386/lib/cpu.c src/arch/i386/smp/start_stop.c src/arch/ppc/boot/linuxbios_table.c src/config/Config.lb src/config/Options.lb src/cpu/i386/entry16.inc src/cpu/i386/entry32.inc src/cpu/k8/cpufixup.c src/cpu/k8/earlymtrr.c src/cpu/k8/earlymtrr.inc src/cpu/k8/enable_mmx_sse.inc src/cpu/p6/Config.lb src/cpu/p6/boot_cpu.c src/cpu/p6/earlymtrr.c src/cpu/p6/mtrr.c src/devices/Config.lb src/devices/chip.c src/devices/device.c src/devices/device_util.c src/devices/hypertransport.c src/devices/pci_device.c src/include/string.h src/include/uart8250.h src/include/cpu/k8/mtrr.h src/include/cpu/p6/mtrr.h src/include/device/chip.h src/include/device/device.h src/include/device/hypertransport.h src/include/device/pci_def.h src/include/device/pnp.h src/include/device/resource.h src/include/pc80/mc146818rtc.h src/lib/Config.lb src/lib/memcpy.c src/lib/uart8250.c src/mainboard/amd/quartet/Config.lb src/mainboard/amd/solo/Config.lb src/mainboard/amd/solo/auto.c src/mainboard/amd/solo/cmos.layout src/mainboard/amd/solo/failover.c src/mainboard/amd/solo/mptable.c src/mainboard/arima/hdama/Config.lb src/mainboard/arima/hdama/auto.c src/mainboard/arima/hdama/cmos.layout src/mainboard/arima/hdama/failover.c src/mainboard/arima/hdama/irq_tables.c src/mainboard/arima/hdama/mainboard.c src/mainboard/newisys/khepri/Config.lb src/mainboard/newisys/khepri/auto.c src/mainboard/tyan/s2881/hypertransport.c src/northbridge/amd/amdk8/Config.lb src/northbridge/amd/amdk8/amdk8.h src/northbridge/amd/amdk8/coherent_ht.c src/northbridge/amd/amdk8/cpu_rev.c src/northbridge/amd/amdk8/early_ht.c src/northbridge/amd/amdk8/misc_control.c src/northbridge/amd/amdk8/northbridge.c src/northbridge/amd/amdk8/raminit.c src/northbridge/amd/amdk8/raminit.h src/northbridge/amd/amdk8/reset_test.c src/pc80/Config.lb src/pc80/keyboard.c src/pc80/mc146818rtc_early.c src/pc80/serial.c src/pc80/serial.inc src/southbridge/amd/amd8111/Config.lb src/southbridge/amd/amd8111/amd8111.c src/southbridge/amd/amd8111/amd8111_acpi.c src/southbridge/amd/amd8111/amd8111_early_smbus.c src/southbridge/amd/amd8111/amd8111_ide.c src/southbridge/amd/amd8111/amd8111_lpc.c src/southbridge/amd/amd8111/amd8111_usb.c src/southbridge/amd/amd8111/amd8111_usb2.c src/southbridge/amd/amd8131/amd8131_bridge.c src/superio/NSC/pc87360/chip.h src/superio/NSC/pc87360/superio.c util/newconfig/config.g util/options/build_opt_tbl.c util/romcc/Makefile util/romcc/romcc.c Added Files: src/arch/i386/include/arch/hlt.h src/arch/i386/include/arch/smp/lapic.h src/cpu/i386/bist32.inc src/cpu/i386/bist32_fail.inc src/cpu/p6/pgtbl.c src/devices/pnp_device.c src/include/cpu/p6/pgtbl.h src/include/device/hypertransport_def.h src/include/device/pnp_def.h src/include/pc80/keyboard.h src/lib/memmove.c src/northbridge/amd/amdk8/incoherent_ht.c src/northbridge/amd/amdk8/raminit_test.c src/pc80/isa-dma.c src/southbridge/amd/amd8111/amd8111_pci.c src/superio/NSC/pc87360/pc87360.h src/superio/NSC/pc87360/pc87360_early_serial.c util/romcc/tests/fail_test6.c util/romcc/tests/fail_test7.c util/romcc/tests/fail_test8.c Removed Files: src/mainboard/arima/hdama/example-fallback.config src/mainboard/arima/hdama/example-normal.config src/mainboard/tyan/s2880/static_devices.c.orig src/northbridge/amd/amdk8/mcf0_control.c ----------------------------------------------------------------------