Author: ward Date: 2008-06-22 16:33:17 +0200 (Sun, 22 Jun 2008) New Revision: 3381
Modified: trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/fanctl.c trunk/coreboot-v2/src/superio/ite/it8716f/superio.c Log:
Enable hardware fan control for m57sli.
Tested on v1 and v2 of the board.
Signed-off-by: Ronald Hoogenboom hoogenboom30@zonnet.nl Signed-off-by: Ward Vandewege ward@gnu.org Acked-by: Ronald Hoogenboom hoogenboom30@zonnet.nl
Modified: trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/fanctl.c =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/fanctl.c 2008-06-22 04:22:46 UTC (rev 3380) +++ trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/fanctl.c 2008-06-22 14:33:17 UTC (rev 3381) @@ -9,16 +9,30 @@ static const struct { uint8_t index, value; } sequence[]= { + /* Make sure we can monitor, and enable SMI# interrupt output */ + { 0x00, 0x13}, + /* Disable fan interrupt status bits for SMI# */ + { 0x04, 0x37}, + /* Disable VIN interrupt status bits for SMI# */ + { 0x05, 0xff}, + /* Disable fan interrupt status bits for IRQ */ + { 0x07, 0x37}, + /* Disable VIN interrupt status bits for IRQ */ + { 0x08, 0xff}, + /* Disable external sensor interrupt */ + { 0x09, 0x87}, + /* Enable 16 bit counter divisors */ + { 0x0c, 0x07}, /* Set FAN_CTL control register (0x14) polarity to high, and activate fans 1, 2 and 3. */ - { 0x14, 0x87}, + { 0x14, 0xd7}, /* set the correct sensor types 1,2 thermistor; 3 diode */ { 0x51, 0x1c}, - /* set the 'zero' voltage for diode type sensor */ + /* set the 'zero' voltage for diode type sensor 3 */ { 0x5c, 0x80}, // { 0x56, 0xe5}, // { 0x57, 0xe5}, - { 0x59, 0xe5}, + { 0x59, 0xec}, { 0x5c, 0x00}, /* fan1 (controlled by temp3) control parameters */ /* fan off limit */ @@ -33,14 +47,24 @@ { 0x64, 0x90}, /* direct-down and interval */ { 0x65, 0x03}, + /* temperature limit of fan stop for fan3 (automatic) */ + { 0x70, 0xff}, + /* temperature limit of fan start for fan3 (automatic) */ + { 0x71, 0x14}, + /* Set PWM start & slope for fan3 */ + { 0x73, 0x20}, + /* Initialize PWM automatic mode slope values for fan3 */ + { 0x74, 0x90}, + /* set smartguardian temperature interval for fan3 */ + { 0x75, 0x03}, /* fan1 auto controlled by temp3 */ { 0x15, 0x82}, - /* fan2 soft controlled, max speed */ - { 0x16, 0x7f}, - /* fan3 soft controlled, 75% speed */ - { 0x17, 0x60}, + /* fan2 auto controlled by temp3 */ + { 0x16, 0x82}, + /* fan3 auto controlled by temp3 */ + { 0x17, 0x82}, /* all fans enable, fan1 ctl smart */ - { 0x13, 0x71} + { 0x13, 0x77} };
#define ARRAYSIZE(x) sizeof x/sizeof *x
Modified: trunk/coreboot-v2/src/superio/ite/it8716f/superio.c =================================================================== --- trunk/coreboot-v2/src/superio/ite/it8716f/superio.c 2008-06-22 04:22:46 UTC (rev 3380) +++ trunk/coreboot-v2/src/superio/ite/it8716f/superio.c 2008-06-22 14:33:17 UTC (rev 3381) @@ -50,6 +50,9 @@ pnp_write_config(dev, 0x02, 0x02); }
+#ifdef HAVE_FANCTL +extern void init_ec(uint16_t base); +#else static void pnp_write_index(uint16_t port_base, uint8_t reg, uint8_t value) { outb(reg, port_base); @@ -62,9 +65,6 @@ return inb(port_base + 1); }
-/* #ifdef HAVE_FANCTL -extern void init_ec(uint16_t base); -#else */ static void init_ec(uint16_t base) { uint8_t value; @@ -80,7 +80,7 @@ printk_debug("FAN_CTL: reg = 0x%04x, writing value = 0x%02x\r\n", base + 0x14, value | 0x87); } -//#endif +#endif
static void it8716f_init(device_t dev) {