On 10/5/07, echelon@free.fr echelon@free.fr wrote:
Hi gentlemens,
Sorry for answering so late, but Im back after 3 sleepless nights so Im under continuous coffee perfusion simply to stay awake.. Firstly to answer to Yinghai, I didn't use dumpio (I don't know what is this..). I'm mostly a hardware guy (I come from the "embedded world") so my first reaction was to put an oscilloscope probe on the PCI bus.. So what have I found out?
- with the initial LinuxBIOS code, it looks like some control signals of
the PCI bus are not correctly driven when on tries to do configuration requests under Linux. More specifically, when a 32b read is done on the CONFIG_DATA port (0cfc) which should trigger a pci configuration register read, one can see that the signal C/BE[3]# (pin 26 - side B on a PCI slot) doesn't rise at a logical level of "1" as it should do. Indeed, the PCI bus spec says that the signals C/BE carry the PCI command code at the beginning of a PCI transaction (p.23 - chapter 3 "Bus Operation"). This code should be "1010" for a configuration read, so C/BE[3] should be '1'. In fact it doesn't .. (I have some pics with my oscilloscope measurement, if someone is interested by them plz let me know..)
- after analising a little bit the code of the mcp55 southbridge in the LB
source tree (especially the mcp55_early_setup_car.c file), I realised the the mcp55 southbridge has some kind of "IO multiplexer" unit (like some modern processors in the embedded world) which enables the configuration of the mcp55 pins either as GPIOs, either as "nominal" functions (PCI control signals for example). So, I asked my self if the GPIO configuration was not fitted for the m57sli board..
- Btw I figured out that registers of the "IO control unit" of mcp55 can be
mapped into the IO space by writting into the SYSCTRL_REG of the 00:01.1 pci device integrated into the SB. Indeed by using this value as a base (under Linux, this register holds the value 0x1400) one can access the GPIO registers of MCP55 (beginning @ the 0xc0 offset? maybe..) These are 8 bit registers apparently..
that is what i called dumpio
you need to mcp55 NDA to read gpio info, also some schematic have table about what gpio should be set. ===> good HW designer put that to make BIOS engineer life easier.
YH