NB_CFG bit 54 for E0 stepping later can be set.
When it is set the initial apic id will be node0/core0 : 0 node0/core1 : 1 node1/core0 : 2 node1/core1 : 3
So you can shift the initial apic id to the node id, but the problem is you need to have right cores_vir, because for single you need to use 2 to shift instead of 1 the core num that you read from msr.
For LinuxBIOS, we go further, that we use NB_CFG bit 54 directly, instead of check cpu version, because only E0 later can be set.
please check the code in LinuxBIOS that we are using to get node id...
YH
static inline unsigned int read_nb_cfg_54(void) { msr_t msr; msr = rdmsr(NB_CFG_MSR); return ( ( msr.hi >> (54-32)) & 1); }
struct node_core_id { unsigned nodeid; unsigned coreid; };
static inline unsigned get_initial_apicid(void) { return ((cpuid_ebx(1) >> 24) & 0xf); }
static inline struct node_core_id get_node_core_id(unsigned nb_cfg_54) { struct node_core_id id; // get the apicid via cpuid(1) ebx[27:24] if( nb_cfg_54) { // when NB_CFG[54] is set, nodid = ebx[27:25], coreid = ebx[24] id.coreid = (cpuid_ebx(1) >> 24) & 0xf; id.nodeid = (id.coreid>>1); id.coreid &= 1; } else { // when NB_CFG[54] is clear, nodeid = ebx[26:24], coreid = ebx[27] id.nodeid = (cpuid_ebx(1) >> 24) & 0xf; id.coreid = (id.nodeid>>3); id.nodeid &= 7; } return id; }
static inline unsigned get_core_num(void) { return (cpuid_ecx(0x80000008) & 0xff); }
static inline struct node_core_id get_node_core_id_x(void) {
return get_node_core_id( read_nb_cfg_54() ); // for pre_e0() nb_cfg_54 always be 0 }