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One7two99 via coreboot wrote:
One additional general question regarding the flashing on X230s.
As you document your experience, please investigate what is specific for the X230, and what is not - and be clear in what you write. (Most things are in no way X230-specific.)
Most howtos include that it is sufficient to flash only the upper 4MB BIOS Chip and leave the 2nd 8 MB BIOS Chip untouched.
I would consider that bad advice, if coreboot.rom is 12 MB.
There are not "two BIOSes" just because there are two memory chips.
The two memory chips are mapped after each other and function as one unit. The CPU sees them as one, and so should you.
After creating my 12 MB Coreboot.rom I split it and use only 4MB for flashing.
So you flash only the last third of the CBFS, and ignore the beginning.
I think it is just luck that your system boots at all. If you used a larger payload such as a kernel then your method will likely cut the payload in half and end up writing incomplete junk to your flash.
You can compare it to deleting the first two thirds of a .zip file.
As far as I understand the 2nd Chip include the Intel Mangement Engine (ME), shouldn't this chip also touched and (at least party) ME'cleaned?
There is no relation between coreboot and the ME. The main CPU and the ME CPU are not very close to each other, and their respective firmware have little to do with each other. They interface through HECI. Neither will care what you do to the other.
Or is the 2nd BIOS not used at all after flashing Coreboot to the top 4MB chip?
Please study the hardware you are working with. What software you put in either memory is not relevant for how the hardware works, for how the two memories are mapped to physical CPU addresses.
//Peter