Re: [coreboot] [PATCH 1/2] cs5536: Add a NAND device and do the IDE PCI header disabling on time.

[Mart Raudsepp]

Ühel kenal päeval, R, 2009-01-09 kell 15:46, kirjutas Peter Stuge:
> Mart Raudsepp wrote:
> > The board doesn't have IDE stuff wired anywhere. No existing boards
> > supported by coreboot do to my knowledge.
>
> ALIX.1, .2 and .6 boards have the CF on IDE and an IDE header in
> parallell.

Sorry, I meant that no existing board supported by coreboot has IDE and
Flash interface wired at the same time currently.

Does your comment still apply then in relation to enable_ide existence
perhaps?
How is the selection between CF and IDE header done on those ALIX
boards?

Mart Raudsepp