Re: [coreboot] v3 CAR/ROM area collision on C7 and Core2Duo

[Carl-Daniel Hailfinger]

On 26.11.2008 23:02, Rudolf Marek wrote:
> > 0xFEC00000 as well. That location is 20 MB below 4GB and the lowest
>
> 0xFEC0_0000 may be fixed location IO APIC. Other possible locations
> are 0xFECX_YZ00 (not that 0xFEC cannot be changed)
> 0xFEEx_xxxx are internal APIC cycles for IRQ (MSI)
>
> FEC0_0000 - FEC7_FFFF VIA APIC in SB (fixed)
> (FEC8_0000 - FECB_FFFF -VIA VPXII APIC)
>
> FED4_4000 - FED4_FFFF trusted platform module MEM decode (fixed)

Thanks, I added this information to a wiki page. The wiki page is
incomplete, feel free to extend it.
http://www.coreboot.org/Memory_map

Regards,
Carl-Daniel