Re: [coreboot] [PATCH] Fix and clean up DBM690T/Pistachio DSDT

[Li, Maggie]

Carl,

The patch has been tested on dbm690t and pistachio. It works.

About the thermal, dbm690t uses adt7461, while pistachio uses adt7475. So, their THOT and TCRT are different. You can get details from their spec.

Best regards
Maggie li

-----Original Message-----
From: Carl-Daniel Hailfinger [mailto:[e-mail]] 
Sent: Wednesday, February 04, 2009 9:42 AM
To: Coreboot
Cc: Bao, Zheng; Li, Maggie
Subject: [coreboot] [PATCH] Fix and clean up DBM690T/Pistachio DSDT

The DBM690T/Pistachio DSDT has some issues in the memory management code:
- TOM is hardcoded to a fixed value and not updated.
- TOM2 is hardcoded as well.
- The TOM2!=0 case is commented out.

Fixes in this patch:
- Rename TOM to TOM1 and refer to the SSDT value with an External(TOM1)
clause.
- An ITE87427 Super I/O does not exist. Use the real name (IT8712F) of
the chip on the DBM690T board.
- Use decimal values for KELV, THOT and TCRT on the Pistachio board for
better readability.

Remaining questions/problems:
- The TOM2 hardcode can't be fixed until the generic K8/Fam10 SSDT
contains TOM2.
- I don't understand how the TOM2!=0 case is supposed to work and simply
uncommenting the code causes the IASL compiler to complain about
truncation of 64 bit values to 32 bit. Can we simply always store the
BIOS data at the top of TOM1? That would eliminate some code.
- Why does the DBM690T have THOT=80°C, TCRT=85°C and Pistachio have 10
Kelvin more (THOT=90°C, TCRT=95°C)?

Signed-off-by: Carl-Daniel Hailfinger

Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl
===================================================================
--- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl	(Revision 3929)
+++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl	(Arbeitskopie)
@@ -30,8 +30,8 @@
    /* Include ("debug.asl") */		/* Include global debug methods if needed */

/* Data to be patched by the BIOS during POST */
+	/* FIXME this is still missing! */
    /* Memory related values */
-	Name(TOM, 0x40000000)/* Top of RAM memory below 4GB */
    Name(TOM2, 0x0)	/* Top of RAM memory above 4GB (>> 16) */
    Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
    Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
@@ -1171,6 +1171,7 @@
    	/*  _SB.PCI0 */
    	/* Note: Only need HID on Primary Bus */
    	Device(PCI0) {
+			External (TOM1)
    		Name(_HID, EISAID("PNP0A03"))
    		Name(_ADR, 0x00180000)	/* Dev# = BSP Dev#, Func# = 0 */
    		Method(_BBN, 0) { /* Bus number = 0 */
@@ -1433,7 +1434,7 @@
    			Name(_ADR, 0x00140006)
    		} /* end Ac97modem */

-			/* ITE87427 Support */
+			/* ITE IT8712F Support */
    		OperationRegion (IOID, SystemIO, 0x2E, 0x02)	/* sometimes it is 0x4E */
    			Field (IOID, ByteAcc, NoLock, Preserve)
    			{
@@ -1457,15 +1458,15 @@
    			APC4,	8	/* APC/PME Control Register 2 */
    		}

-			/* Enter the 87427 MB PnP Mode */
+			/* Enter the IT8712F MB PnP Mode */
    		Method (EPNP)
    		{
    			Store(0x87, SIOI)
    			Store(0x01, SIOI)
    			Store(0x55, SIOI)
-				Store(0x55, SIOI) /* 87427 magic number */
+				Store(0x55, SIOI) /* IT8712F magic number */
    		}
-			/* Exit the 87427 MB PnP Mode */
+			/* Exit the IT8712F MB PnP Mode */
    		Method (XPNP)
    		{
    			Store (0x02, SIOI)
@@ -1482,7 +1483,7 @@
    			If (LLess (Arg0, 0x05))
    			{
    				EPNP()
-					/* DBGO("87427F\n") */
+					/* DBGO("IT8712F\n") */

Store (0x4, LDN)
    				Store (One, ACTR)  /* Enable EC */
@@ -1593,7 +1594,7 @@
    			}

/* Set size of memory from 1MB to TopMem */
-				Subtract(TOM, 0x100000, DMLL)
+				Subtract(TOM1, 0x100000, DMLL)

/*
    			* If(LNotEqual(TOM2, 0x00000000)){
Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl
===================================================================
--- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl	(Revision 3929)
+++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl	(Arbeitskopie)
@@ -30,8 +30,8 @@
    /* Include ("debug.asl") */		/* Include global debug methods if needed */

/* Data to be patched by the BIOS during POST */
+	/* FIXME this is still missing! */
    /* Memory related values */
-	Name(TOM, 0x40000000)/* Top of RAM memory below 4GB */
    Name(TOM2, 0x0)	/* Top of RAM memory above 4GB (>> 16) */
    Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
    Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
@@ -1170,6 +1170,7 @@
    	/*  _SB.PCI0 */
    	/* Note: Only need HID on Primary Bus */
    	Device(PCI0) {
+			External (TOM1)
    		Name(_HID, EISAID("PNP0A03"))
    		Name(_ADR, 0x00180000)	/* Dev# = BSP Dev#, Func# = 0 */
    		Method(_BBN, 0) { /* Bus number = 0 */
@@ -1516,7 +1517,7 @@
    			}

/* Set size of memory from 1MB to TopMem */
-				Subtract(TOM, 0x100000, DMLL)
+				Subtract(TOM1, 0x100000, DMLL)

/*
    			* If(LNotEqual(TOM2, 0x00000000)){
@@ -1676,9 +1677,9 @@

/* THERMAL */
    Scope(_TZ) {
-		Name (KELV, 0x0AAC)
-		Name (THOT, 0x0384)
-		Name (TCRT, 0x03B6)
+		Name (KELV, 2732)
+		Name (THOT, 900)
+		Name (TCRT, 950)

ThermalZone(TZ00) {
    		Method(_AC0,0) {	/* Active Cooling 0 (0=highest fan speed) */
@@ -1759,4 +1760,3 @@
    }
 }
 /* End of ASL file */
-