Re: [coreboot] [PATCH] flashrom: Add support for SPI-Chips on ICH9

[Peter Stuge]

On Fri, May 16, 2008 at 11:45:04AM +0200, Dominik Geyer wrote:
> Adds support for SPI-Chips on ICH9. This is done by using the generic SPI 
> interface.
>
> Signed-off-by: Dominik Geyer <dominik.geyer <at> kontron.com>

I think the opcode defines have too long names, and I would like the
struct types to be lowercase, but:

Acked-by: Peter Stuge
> this is the rework of the initial patch. It is based on r3321 and
> was tested with an "Atmel 25DF321" and a "ST M25P32".

Thanks for adding the test status too! :)
> Something I noticed during fixing:
> What exactly is the flashchip.page_size? For LPC flashes it
>
> seems to be the erase-granularity, for SPI flashes it seems to be
> the page-write-granularity.

It is not used so it may have junk for some chips. We have been
thinking about how to be clever about partial flashing. At some
point I want flashrom and lar to converge and then we need more
information about the flash chips to do the right thing most of
the time.
> diff -Naur coreboot-v2.orig/util/flashrom/Makefile 
> coreboot-v2/util/flashrom/Makefile
> --- coreboot-v2.orig/util/flashrom/Makefile	2008-05-16 09:13:01.000000000 
> +0000
> +++ coreboot-v2/util/flashrom/Makefile	2008-05-16 09:16:58.000000000 +0000
> @@ -24,7 +24,8 @@
>    sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \
>    w49f002u.o 82802ab.o msys_doc.o pm49fl004.o sst49lf040.o \
>    sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \
> flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o
> flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \
> ichspi.o
>
> all: pciutils dep $(PROGRAM)
>
> diff -Naur coreboot-v2.orig/util/flashrom/chipset_enable.c 
> coreboot-v2/util/flashrom/chipset_enable.c
> --- coreboot-v2.orig/util/flashrom/chipset_enable.c	2008-05-16 
> 09:13:01.000000000 +0000
> +++ coreboot-v2/util/flashrom/chipset_enable.c	2008-05-16 09:13:55.000000000 
> +0000
> @@ -198,7 +198,7 @@
>    /* Calculate the Root Complex Register Block address */
>    tmp &= 0xffffc000;
>    printf_debug("Root Complex Register Block address = 0x%x\n", tmp);
> rcrb = mmap(0, 0x4000, PROT_READ, MAP_SHARED, fd_mem, (off_t)tmp);
> rcrb = mmap(0, 0x4000, PROT_READ | PROT_WRITE, MAP_SHARED, fd_mem,
>
> (off_t)tmp);
>    if (rcrb == MAP_FAILED) {
>    	perror("Can't mmap memory using " MEM_DEV);
>    	exit(1);

This change was committed just now. :)

//Peter